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* tegra2: Always build with USE_PRIVATE_LIBGCC=yes.Thierry Reding2011-12-24-0/+2
| | | | | | | | | | The AVP on Tegra2 doesn't boot properly when U-Boot is linked against the GCC provided libgcc. To work around this, always build and link against a private libgcc for Tegra2-based boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Implement SPI / UART GPIO switchSimon Glass2011-12-24-0/+46
| | | | | | | | | | | | | | | | The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-24-0/+77
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arm, davinci: Fix build warnings for cam_enc_4xxChristian Riesch2011-12-24-2/+3
| | | | | | | | | | | | This patch fixes a build warning for the cam_enc_4xx board introduced by commit d6ec0c0dfc70447cf615ae80a952da81f73f16b4: spl.c:35:13: warning: 'gdata' defined but not used spl.c:36:13: warning: 'bdata' defined but not used Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* arm, davinci: Add SPL support for DA850 SoCsChristian Riesch2011-12-24-2/+35
| | | | | | | | | | This code adds an SPL for booting from SPI flash on DA850 SoCs. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
* Merge branch 'next' of ../nextWolfgang Denk2011-12-23-128/+1011
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of ../next: mkenvimage: Add version info switch (-V) mkenvimage: Fix getopt() error handling mkenvimage: Fix some typos phy: add Micrel KS8721BL phy definition net: introduce per device index mvgbe: remove setting of ethaddr within the driver x86: Add support for specifying an initrd with the zboot command x86: Refactor the zboot innards so they can be reused with a vboot image x86: Add infrastructure to extract an e820 table from the coreboot tables x86: Add support for booting Linux using the 32 bit boot protocol x86: Clean up the x86 zimage code in preparation to extend it x86: Import code from coreboot's libpayload to parse the coreboot table x86: Initial commit for running as a coreboot payload CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/hh405/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c CHECKPATCH: ./board/esd/apc405/fpgadata.c CHECKPATCH: ./board/esd/voh405/fpgadata.c CHECKPATCH: ./board/esd/ash405/fpgadata.c CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c CHECKPATCH: ./board/esd/ar405/fpgadata.c CHECKPATCH: ./board/esd/plu405/fpgadata.c CHECKPATCH: ./board/esd/wuh405/fpgadata.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c CHECKPATCH: ./board/esd/canbt/fpgadata.c CHECKPATCH: ./board/esd/du405/fpgadata.c CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c avr32:mmu.c: fix printf() length modifier fat.c: fix printf() length modifier cmd_sf.c: fix printf() length modifier Make printf and vprintf safe from buffer overruns vsprintf: Move function documentation into header file Add safe vsnprintf and snprintf library functions Move vsprintf functions into their own header Conflicts: tools/mkenvimage.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * x86: Add support for specifying an initrd with the zboot commandGabe Black2011-12-19-4/+19
| | | | | | | | | | | | | | | | | | | | | | This change finishes plumbing the initrd support built into the zboot mechanism out to the command interface. It also fixes a bug in the command declaration where the kernel size could be passed as an optional second parameter but not enough arguments were allowed. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Refactor the zboot innards so they can be reused with a vboot imageGabe Black2011-12-19-90/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If vboot successfully verifies a kernel, it will leave it in place and basically ready to boot. The zeropage table which is part of the x86 boot protocol is at the end of the kernel, though, instead of the beginning, and because the image is already in place there's no need to copy it around. This change refactors the code which implements the zboot command so that the configuration of the zeropage table and loading the pieces of the kernel into memory are done separately. Also, because the command line goes before the zeropage table in vboot which is somewhat incompatible with the normal protocol, where to put the command line is a now a parameter instead of being hard coded. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add infrastructure to extract an e820 table from the coreboot tablesGabe Black2011-12-19-1/+37
| | | | | | | | | | | | | | | | Also approximate the size of RAM using the largest RAM address available in the tables. There may be areas which are marked as reserved which are actually at the end of RAM. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add support for booting Linux using the 32 bit boot protocolGabe Black2011-12-19-17/+62
| | | | | | | | | | | | | | | | | | This change conditionally modifies the zboot command so that it can use the 32 bit boot protocol. This is necessary because the 16 bit realmode entry point assumes that it can call BIOS services which neither coreboot nor u-boot provide. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Clean up the x86 zimage code in preparation to extend itGabe Black2011-12-19-58/+45
| | | | | | | | | | | | | | | | This change cleans up some formatting issues in the zimage handling code, and converts it from using offsets added to a base pointer to using the available structure definitions which were already being included. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Import code from coreboot's libpayload to parse the coreboot tableGabe Black2011-12-19-0/+620
| | | | | | | | | | | | | | | | | | | | | | | | | | This change also forces the lib_sysinfo structure to be in the .data section. Otherwise it ends up in the .bss section. U-boot assumes that it doesn't need to copy it over during relocation, and instead fills that whole section with zeroes. If we really were booting from ROM that would be appropriate, but we need some information from the coreboot tables (memory size) before then and have to fill that structure before relocation. We skirt u-boot's assumption by putting this in .data where it assumes there is still read only but non-zero data. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Initial commit for running as a coreboot payloadGabe Black2011-12-19-0/+148
| | | | | | | | | | | | | | | | Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * avr32:mmu.c: fix printf() length modifierAndreas Bießmann2011-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | avr32 uses unsigned long addresses, fix the printf() length modifier for that fact. Before this patch following warning occours: ---8<--- mmu.c: In function 'mmu_init_r': mmu.c:25: warning: format '%08x' expects type 'unsigned int', but argument 2 has type 'uintptr_t' --->8--- Signed-off-by: Andreas Bießmann <biessmann@corscience.de> cc: Mike Frysinger <vapier@gentoo.org> cc: Thomas Chou <thomas@wytron.com.tw> cc: Reinhard Meyer <u-boot@emk-elektronik.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | arm: Tegra: fix undefined instruction hang immediately after resetTom Warren2011-12-21-0/+2
| | | | | | | | | | | | | | | | | | | | | | commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't execute on Tegra, due to the AVP (ARM7TDI) not having a CP15. Result was an undefined instruction hang just after reset. Signed-off-by: Tom Warren <twarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Aneesh V <aneesh@ti.com>
* | AVR32: fix timer_init() functionSven Schnelle2011-12-20-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | timer_init() now returns an int (the error code) instead of void. This makes compilation fail with: interrupts.c:111: error: conflicting types for 'timer_init' /home/svens/u-boot/u-boot/include/common.h:246: error: previous declaration of 'timer_init' was here make[1]: *** [interrupts.o] Error 1 Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | arm, fdt: update ethernet mac address before booting LinuxHeiko Schocher2011-12-19-0/+2
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Gerald van Baren <gvb.uboot@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de>
* | add print_cpuinfo to s3c24x0David Müller (ELSOFT AG)2011-12-19-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | Hello This patch adds support for "print_cpuinfo" on Samsung s3c24x0 based targets. If activated by "#define CONFIG_DISPLAY_CPUINFO", the chip ID and the 3 main cpu frequencies will be displayed. Dave Signed-off-by: David Müller <d.mueller@elsoft.ch>
* | omap4_panda: Initialize the USB phyChris Lalancette2011-12-19-0/+63
| | | | | | | | | | | | | | | | | | | | During misc_init_r, make sure to setup the clocks properly for the USB hub on the pandaboard. With this in place, the USB hub and the ethernet works on the pandaboard. Signed-off-by: Chris Lalancette <clalancette@gmail.com> Acked-by: Aneesh V <aneesh@ti.com>
* | davinci: Fixed wrong timebase clock frequency.Manfred Rudigier2011-12-19-1/+1
| | | | | | | | Signed-off-by: Manfred Rudigier <manfred.rudigier@omicron.at>
* | arm926ejs: remove noop flush_dcache_all functionIlya Yanok2011-12-19-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2f3427c added noop cache functions implementation for arm926ejs to fix compilation of drivers depending on these functions (DaVinci EMAC in particular). Unfortunately, the bug was introduced: noop implementation calls dcache_disable which calls flush_dcache_all which in turn calls dcache_disable thus creating an infinite loop. This patch removes noop implementation for flush_dcache_all, we already have default one in arch/arm/lib/cache.c and it should be used instead. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Tested-by: Matthias Weisser <weisserm@arcor.de>
* | Coding Style cleanupWolfgang Denk2011-12-19-2/+1
|/ | | | | | | Fix trailing white space, indentation by spaces instead of TABs, excessive blank lines, trailing blank lines. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2011-12-17-0/+1
|\ | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: USB: Use (get|put)_unaligned for accessing wMaxPacketSize usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal) README: add documentation for CONFIG_USB_ULPI* USB: ULPI: increase error case verbosity USB: ULPI: clean a mixup of return types USB: ULPI: switch argument type from u8 to unsigned
| * usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal)Lukasz Majewski2011-12-16-0/+1
| | | | | | | | | | | | | | | | | | | | This commit enables support for USB Gadgets on the Exynos4210 (C210 Universal) reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> CC: Remy Bohmer <linux@bohmer.net>
* | powerpc/mpc83xx: set TXEQA/TXEQE value for mpc837XE sataJerry Huang2011-12-12-1/+10
|/ | | | | | | | | | | | In the current u-boot code, the value of these fields are the reserved value (0b100), through the signal integrity measurement on freescale's board with these reserved setting, the signal eye is out of the recommended spec for non-transition amplitude at 500mV nominal. According to the errata for MPC8379E, we should make a change to the recommended setting from essentially nothing at this time to 0b001 for SATA. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/bootm: Flush ramdisk and device tree image when booting on MPKumar Gala2011-12-12-6/+16
| | | | | | | | | | | | | We already flush the kernel image after we've loaded it to ensure visiblity to the other cores. We need to do the same thing for the ramdisk and device tree images. In AMP boot scenarios we might not be HW cache coherent with the secondary core that we are loading and setting the ramdisk and device tree up for. Thus we need to ensure we've flushed the regions of memory utilized by ramdisk and device tree so the loadding and any modifications (from decompression or fdt updates) are made visible to the secondary cores. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2011-12-12-7/+93
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: USB: efikamx: Enable USB on EfikaMX and EfikaSB USB: Add generic ULPI layer and a viewport USB: EHCI: Allow EHCI post-powerup configuration in board files USB: mx51evk: add end enable USB host support on port 1 USB: mx53loco: add end enable USB host support on port 1 USB: MX5: Add MX5 usb post-init callback USB: MX5: Abstract out mx51 USB pixmux configuration USB: MX5: add generic USB EHCI support for mx51 and mx53 USB: MX5: add helper functions to enable USB clocks usb:gadget:s5p Enable the USB Gadget framework at GONI usb:gadget:s5p USB Device Controller (UDC) implementation ehci: speed up initialization usb: add help for missing start subcommand cosmetic: remove excess whitespace from usb command help usb: align usb_endpoint_descriptor to 16-bit boundary usbtty: init endpoints prior to startup events pxa: convert pxa27x_udc to use read and write functions pxa: activate the first usb host port on pxa27x by default pxa: fix usb host register mismatch ehci-fsl: correct size of ehci caplength USB: Add usb_event_poll() to get keyboards working with EHCI USB: gadaget: add Marvell controller support USB: Fix complaints about strict aliasing in OHCI-HCD USB: Drop dead code from usb_kbd.c USB: Rework usb_kbd.c USB: Add functionality to poll the USB keyboard via control EP
| * USB: MX5: add helper functions to enable USB clocksWolfgang Grandegger2011-12-11-0/+80
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com> V2: Fix spacing in crm_regs.h
| * usb:gadget:s5p Enable the USB Gadget framework at GONILukasz Majewski2011-12-11-0/+4
| | | | | | | | | | | | | | | | | | | | This commit enables support for USB Gadgets on the GONI reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Remy Bohmer <linux@bohmer.net>
| * pxa: convert pxa27x_udc to use read and write functionsStefan Herbrechtsmeier2011-12-11-4/+4
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
| * pxa: activate the first usb host port on pxa27x by defaultStefan Herbrechtsmeier2011-12-11-2/+2
| | | | | | | | | | | | | | | | The pxa27x has 3 usb host ports. Activate all by default. Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
| * pxa: fix usb host register mismatchStefan Herbrechtsmeier2011-12-11-1/+3
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-12-12-0/+4
|\ \ | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: arm: add __aeabi_unwind_cpp_pr1() function to avoid linker complaints post: fix compile issue for post tests on kirkwood
| * | arm: add __aeabi_unwind_cpp_pr1() function to avoid linker complaintsWolfgang Grandegger2011-12-11-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the ELDK 5.1 (beta) "armv7a" toolchain I'm get the following build failure: $ ./MAKEALL mx51evk ... /opt/eldk-5.1/armv7a/sysroots/arm-linux-gnueabi/usr/lib/arm-linux- gnueabi/4.6.1/libgcc.a(bpabi.o):(.ARM.exidx+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' make: *** [u-boot] Error 1 This patch fixes the issue similar to commit d442b6e7ad6a86e2fd0e6297291fe8872ff26fc6 but I don't know if it's general enough or if it does harm when using other toolchains. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* | sandbox: fix compiling of cpu/os.cAndreas Bießmann2011-12-10-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-boot itself generally builds with -nostdinc. This is because the bootloader needs to be completely standalone. In the sandbox arch though, we need a little bit of code to glue the u-boot world to the host operating system, and we need to be able to access the host libc's headers in order to do so. Currently, we're using -I/usr/include to workaround the global -nostdinc, but that doesn't work for everyone and for all headers. Instead, let's filter out -nostdinc when building the os.c code. Without this patch, some distros hit errors such as: ---8<--- In file included from /usr/include/fcntl.h:27:0, from os.c:22: /usr/include/features.h:323:26: fatal error: bits/predefs.h: No such file or directory --->8--- Signed-off-by: Andreas Bießmann <biessmann@corscience.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | sandbox: Add timer simulationMatthias Weisser2011-12-10-2/+30
| | | | | | | | | | | | | | Making sleep command work Signed-off-by: Matthias Weisser <weisserm@arcor.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | sandbox: Add improved RAM simulationMatthias Weisser2011-12-10-7/+17
|/ | | | | | | | | Using mmap to allocate memory from the OS for RAM simulation we can use u-boot own malloc implementation. Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Matthias Weisser <weisserm@arcor.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* arm, davinci: Use lldiv for the 64-bit divisions in timer.cChristian Riesch2011-12-10-2/+4
| | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* M28: Cleanup memsize.o OOT buildMarek Vasut2011-12-09-23/+9
| | | | | | | | | | | | | | | | The current way memsize.c is built just made a symlink into the directory with SPL and then compiled it like any other file there. This was bad as that broke the out-of-tree build. The new way introduced in this patch uses the standard spl/Makefile methods (CONFIG_SPL_LIBCOMMON_SUPPORT / CONFIG_SPL_LIBGENERIC_SUPPORT) to let files in common/ be built. Because common/Makefile says memsize.c is always built (SPL and non-SPL build), this fixes our issue with memsize.c out-of-tree build. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28Marek Vasut2011-12-09-0/+1617
| | | | | | | | | | This moves SPL to common location so it can be reused by multiple boards. Also, this commit adjusts M28 SoM to avoid breakage due to the move. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.mx: add the initial support for freescale i.MX6Q processorJason Liu2011-12-09-0/+3628
| | | | | | | | i.MX6Q is freescale quad core processors with ARM cortex_a9 complex. This patch is to add the initial support for this processor. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de>
* i.mx: introduce the armv7/imx-common folderJason Liu2011-12-09-86/+165
| | | | | | | | | | | | | | | | | In order to support the coming MX6 platform and to reducde the duplicated code, we had better move some common files or functions to the imx-common folder for sharing. This patch does the following: - move speed.c file from armv7/mx5/speed.c to armv7/imx-common/speed.c - move armv7/mx5/timer.c to armv7/imx-common/timer.c, no any new feature added but just fix the checkpatch errors in the old file and remove the CONFIG_SYS_MX5_CLK32 reference in the file - create one new file cpu.c file to store the common function with i.mx5/6 Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* S5PC2XX: Rename S5pc2XX to exynosChander Kashyap2011-12-09-72/+72
| | | | | | | | | | | | | | As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* tegra2: Don't use board pointer before it is set upSimon Glass2011-12-09-9/+1
| | | | | | | | | | In board_init_f() the gd->bd pointer is not valid when dram_init() is called. This only avoids dying because DRAM is at zero on Tegra2. The common ARM routine sets up the banks in the same way anyway, so we can just remove this code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Remove unneeded 'dynamic ram size' messageSimon Glass2011-12-09-3/+1
| | | | | | | | | | | | | | | | | | | | | | | This message is not required, since it is followed by an 'official' U-Boot message. U-Boot 2011.03-00048-gd7cb0d3 (May 11 2011 - 17:17:23) TEGRA2 Board: NVIDIA Seaboard dynamic ram_size = 1073741824 DRAM: 1 GiB becomes: TEGRA2 Board: NVIDIA Seaboard DRAM: 1 GiB This is a separate commit since it changes behavior. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Remove unneeded boot codeSimon Glass2011-12-09-147/+1
| | | | | | | | Since we have cache support built in we can remove Tegra's existing cache initialization code amd other related dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Move CP15 init out of cpu_init_crit()Simon Glass2011-12-09-6/+21
| | | | | | | | | | | | | | | | | | | | Some SOCs have do not start up with their 'main' CPU. The first U-Boot code may then be executed with a CPU which does not have a CP15, or not a useful one. Here we split the initialization of CP15 into a separate call, which can be performed later if required. Once the main CPU is running, you should call cpu_init_cp15() to perform this init as early as possible. Existing ARMv7 boards which define CONFIG_SKIP_LOWLEVEL_INIT should not need to change, this CP15 init is still skipped in that case. The only impact for these boards is that the cpu_init_cp15() will be available even if it is never used on these boards. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Simplify tegra_start() boot pathSimon Glass2011-12-09-25/+37
| | | | | | | | | | | | | | | | | The Tegra2 boot path is more complicated than it needs to be. Since we want to move to building most of U-Boot with ARMv7 and only a small part with ARMv4T (for AVP) it should be as simple as possible. This makes tegra2_start() into a simple function which either does AVP init or A9 init depending on which core is running it. Both cores now following the same init path, beginning at _start, and the special Tegra2 boot path code is no longer required. Only two files need to be built for ARMv4T, and this is handled in the Tegra2 CPU Makefile. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add arch_cpu_init() to fire up Cortex-A9Simon Glass2011-12-09-0/+21
| | | | | | | | | | | | | We want to move away from a special Tegra2 start-up, and just use arch_cpu_init() instead. However, if we run board_init_f() from boot we need to build it for ARMv4T, since the Tegra's AVP start-up CPU does not support ARMv7. The effect of this is to do the AVP init earlier, and in arch_cpu_init(), rather that board_early_init_f(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Fix warnings in arch/arm/cpu/arm920t/s3c24x0/usb_ohci.cSimon Glass2011-12-09-8/+12
| | | | | | | | | | | | | | | | | Sorry if this is already fixed somewhere - I could not find it. This fixes these warnings: usb_ohci.c: In function 'submit_control_msg': usb_ohci.c:1081: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1081: note: initialized from here usb_ohci.c:1084: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1084: note: initialized from here usb_ohci.c:1087: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1087: note: initialized from here Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
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