summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
* arm: Keep track of the tlb size as well as its locationGabe Black2013-01-10-2/+4
| | | | | | | | | It may be necessary to know where the TLB area ends as well as where it starts. This allows board code to complete a secure memory erase without destroying the page tables. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: move flush_dcache_all() to just before disable cacheArun Mankuzhi2013-01-10-1/+4
| | | | | | | | | | | | | | | | | | | In Cortex-A15 architecture, when we run cache invalidate the cache clean operation executes automatically. So if there are any dirty cache lines before disabling the L2 cache these will be synchronized with the main memory when invalidate_dcache_all() runs in the last part of U-boot The two functions after flush_dcache_all is using the stack. So this data will be on the cache. After disable when invalidate is called the data will be flushed from cache to memory. This corrupts the stack in invalida_dcache_all. So this change is required to avoid the u-boot hang. So flush has to be done just before clearing CR_C bit Signed-off-by: Arun Mankuzhi <arun.m@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-09-0/+15
|\
| * at91sam9x5: enable USB support for 9x5ek board.Richard Genoud2012-12-09-0/+15
| | | | | | | | | | | | Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'u-boot-marvell/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-09-3/+3
|\ \
| * | arch-kirkwood: Ethernet port macro returning incorrect addressLuke Lowrey2013-01-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modified the arch-kirkwood header so KWGBE_PORT_SERIAL_CONTROL1_REG(x) returns the correct address. Originally calling KWGBE_PORT_SERIAL_CONTROL1_REG(1) returned the address for port 0 and vice versa. Doesn't have any knock on effects to the u-boot code as the only time they're used is to do the same function to both addresses Signed-off-by: Luke Lowrey <luke@chamsys.co.uk> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | kirkwood: make MPP arrays static constAlbert ARIBAUD2013-01-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This saves stack and code memory for local copy, and consumes initialized data memory. For 22 of the 29 kirkwood-based boards, this results in a global saving of about 30 bytes. For 7 of them, it results in an increase of 6 to 14 bytes. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | arm: remove useless code in start.S filesAlbert ARIBAUD2013-01-08-10/+0
| | | | | | | | | | | | | | | | | | | | | Remove code such as unneeded includes or labels. These removals have no functional effect. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | arm: move C runtime setup code in crt0.SAlbert ARIBAUD2013-01-08-674/+300
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move all the C runtime setup code from every start.S in arch/arm into arch/arm/lib/crt0.S. This covers the code sequence from setting up the initial stack to calling into board_init_r(). Also, rewrite the C runtime setup and make functions board_init_*() and relocate_code() behave according to normal C semantics (no jumping across the C stack any more, etc). Some SPL targets had to be touched because they use start.S explicitly or for some reason; the relevant maintainers and custodians are cc:ed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-08-52/+762
|\ \ | | | | | | | | | | | | This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
| * | gpio: add gpio_is_valid() to omap_gpio APINikita Kiryanov2012-12-10-0/+7
| | | | | | | | | | | | | | | | | | | | | Add gpio_is_valid() to omap_gpio API Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | davinci: fixed cpu resetDavide Bonfanti2012-12-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The reset procedure works on watchdog timer while before it was modifying TIMER_1 registers. Tested on DM365. Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
| * | omap: emif: configure emif only when requiredLokesh Vutla2012-12-10-5/+36
| | | | | | | | | | | | | | | | | | | | | | | | DMM_LISA_MAP registers program whether memory is mapped on particular EMIF or not. Irrespective of these registers EMIF is getting configured. Correcting the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | OMAP: Tweak omap-common/Makefile since reset.S -> reset.cRobert P. J. Day2012-12-10-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | Git commit d417d1db5f9092d125ddea882ced77eaa5f3d236 replaced the omap-common file reset.S with reset.c, but the Makefile was not adjusted for that. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * | omap4: Add comments on some "#endif"s for readability.Robert P. J. Day2012-12-10-3/+3
| | | | | | | | | | | | | | | | | | No functional changes, simply for readability. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * | omap3: Add a few comments to "#endif"s for readability.Robert P. J. Day2012-12-10-4/+4
| | | | | | | | | | | | | | | | | | | | | No functional changes, just more comments for readability when a preprocessor check spans more than a few lines, and for consistency. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * | Pass sdrc timing values through board_sdrc_timings structurePeter Barada2012-12-10-22/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of passing individual registers by value to board_get_mem_timings, pass a board_mem_timings structure pointer for the board files to fill in. Pass same structure pointer to write_sdrc_timings. This saves about 90 bytes of space in SPL. Signed-off-by: Peter Barada <peter.barada@logicpd.com>
| * | am33xx: add ELM supportMansoor Ahamed2012-12-10-0/+311
| | | | | | | | | | | | | | | | | | | | | | | | | | | AM33XX has Error Location Module (ELM) that can be used in conjuction with GPMC controller to implement BCH codes fully in hardware. This code is mostly taken from arago tree. Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | am33xx: NAND supportIlya Yanok2012-12-10-0/+370
| | | | | | | | | | | | | | | | | | | | | | | | TI AM33XX has the same GPMC controller as OMAP3 so we could just use the existing omap_gpmc driver. This patch adds adds required definitions/intialization. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | OMAP: include sys_proto.h from boot-commonIlya Yanok2012-12-10-0/+1
| | | | | | | | | | | | | | | | | | | | | Include asm/arch/sys_proto.h for gpmc_init prototype. Without this we get a warning while building for AM335x. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | omap3/mem.c: remove unused definesAndreas Bießmann2012-12-10-14/+0
| |/ | | | | | | | | | | | | | | These GPMC_CS defines are a leftover from prior gpmc_init(). Commit 187af954 removed the need for these definitions but missed to remove them. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com>
| |
| \
| \
| \
*---. \ Merge samsung, imx, tegra into u-boot-arm/masterAlbert ARIBAUD2012-12-22-706/+3884
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as well as a few manual merge fixes.
| | | * Merge remote-tracking branch 'u-boot/master' into u-boot-arm-mergedAllen Martin2012-12-19-445/+3766
| | | |\ | |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| | | * env: Use getenv_yesno() more generallyJoe Hershberger2012-12-13-20/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the getenv_yesno() to env_common.c and change most checks for 'y' or 'n' to use this helper. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| | | * Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2012-12-12-1/+4
| | | |\
| | | | * mips: serial: Fix busted manual relocationJoe Hershberger2012-12-12-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | serial_initialize() must be called after relocation to adjust the pointers to putc(), getc(), etc. This is busted ever since the serial driver-model-ification series. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | | | * MIPS: constify mips_io_port_baseDaniel Schwierzeck2012-12-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mips_io_port_base is exported as 'extern const unsigned long mips_io_port_base;' in arch/mips/include/asm/io.h. Thus make the variable const too. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | | * | Add strcasecmp() and strncasecmp()Simon Glass2012-12-11-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | strncasecmp() is present as strnicmp() but disabled. Make it available and define strcasecmp() also. There is a only a small performance penalty to having strcasecmp() call strncasecmp(), so do this instead of a standalone function, to save code space. Update the prototype in arch-specific headers as needed to avoid warnings. Signed-off-by: Simon Glass <sjg@chromium.org>
| | | * | exynos:pinmux: Add pinmux support for i2cPiotr Wilczek2012-12-11-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinmux for I2C for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | exynos:cpu: Add Exynos4 I2C spacingPiotr Wilczek2012-12-11-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add the spacing for i2c for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | exynos:clock: Add i2c clockPiotr Wilczek2012-12-11-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds i2c clock for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * | mxs: i2c: Implement algorithm to set up arbitrary i2c speedMarek Vasut2012-12-11-0/+3
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This algorithm computes the values of TIMING{0,1,2} registers for the MX28 I2C block. This algorithm was derived by using a scope, but the result seems correct. The resulting values programmed into the registers do not correlate with the contents in datasheet. When using the values from the datasheet, the I2C clock were completely wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
| | | * MIPS: constify address pointer in test_bit()Daniel Schwierzeck2012-12-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix several warnings when enabling UBIFS on MIPS: In file included from ubifs.h:2137:0, from ubifs.c:26: misc.h: In function 'ubifs_zn_dirty': misc.h:38:2: warning: passing argument 2 of 'test_bit' discards 'const' qualifier from pointer target type [enabled by default] ../include/asm/bitops.h:569:23: note: expected 'volatile void *' but argument is of type 'const long unsigned int *' Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | | * MIPS: fix a latent bug on initialize $gpZhi-zhou Zhang2012-12-08-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If bal is 8 bytes aligned, the _gp will not be 8 bytes aligned. then the following ld insntrustion generates a Adel exception. So here make _gp be always aligned in 8 bytes. Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | * | Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic2012-12-08-419/+3662
| | |\ \ | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/woodburn_common.h board/woodburn/woodburn.c These boards still use the old old PMIC framework, so they do not merge properly after the power framework was merged into mainline. Fix all conflicts and update woodburn to use Power Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | mxs: SPL: Generalize memory initializationOtavio Salvador2012-12-07-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a generic 'dram_vals[]' array that has the full initialization sequence and rename the initialization method so it doesn't has a frequency on its name. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | mxs: Staticize SPL functionsMarek Vasut2012-12-04-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MXS SPL didn't mark local functions "static". Fix it. This also makes the SPL smaller by roughly 300 bytes. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Properly setup VDDD in power supply setup codeMarek Vasut2012-12-04-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory setup code adjusted the VDDD voltage. Remove this adjustment and configure the VDDD voltage correctly in the power supply setup code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mxs: Implement common function to setup VDDxMarek Vasut2012-12-04-170/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement common function to setup the VDDIO, VDDD and VDDA voltage. Right now, there are two almost identical functions to setup VDDIO and VDDD, which is prone to breakage. Pull out the differences into constant structure and pass them as an argument to the common function. Moreover, the function has almost identical loops for setting higher and lower VDDx voltage. Merge these two loops. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mx28: Rename regs-power.h to regs-power-mx28.hMarek Vasut2012-12-04-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX23 has different register layout and bit placement in the power supply. Thus, in order to be able to add support for MX23, rename the MX28's regs-power.h to regs-power-mx28.h . Moreover, add ifdef around inclusion of regs-*-mx28.h in imx-regs.h so the MX23 boards will include proper set of registers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registersMarek Vasut2012-12-04-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These registers don't have _SET, _CLR and _TOG at the respective offsets available, these registers has to be toggled via R-M-W if needed. Thus do not export these offsets anymore. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-419/+3662
| |\ \ \ |/ / / / | | | _ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * | x86: Build vga video code only if CONFIG_VIDEO_VGA is definedSimon Glass2012-12-06-2/+2
| | | | | | | | | | | | | | | | | | | | | When running from coreboot we don't want this code, so make it optional. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Remove video_init() prototype from u-boot-x86.hSimon Glass2012-12-06-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | This function is not intended to be exported from the video drivers, so remove the prototype. This fixes an error: cfb_console.c:1793:12: error: static declaration of 'video_init' follows non-static declaration Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: drop unused code in coreboot.cStefan Reinauer2012-12-06-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function setup_pcat_compatibility() is weak and implemented as empty function in board.c hence we don't have to override that with another empty function. monitor_flash_len is unused, drop it. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Remove coreboot_ from file nameStefan Reinauer2012-12-06-2/+1
| | | | | | | | | | | | | | | | | | | | | ... because that information is already "encoded" in the directory name. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Provide a way to throttle port80 accessesVadim Bendebury2012-12-06-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems (like Google Link device) provide the ability to keep a history of the target CPU port80 accesses, which is extremely handy for debugging. The problem is that the EC handling port 80 access is orders of magnitude slower than the AP. This causes random loss of trace data. This change allows to throttle port 80 accesses such that in case the AP is trying to post faster than the EC can handle, a delay is introduced to make sure that the post rate is throttled. Experiments have shown that on Link the delay should be at least 350,000 of tsc clocks. Throttling is not being enabled by default: to enable it one would have to set MIN_PORT80_KCLOCKS_DELAY to something like 400 and rebuild the u-boot image. With upcoming EC code optimizations this number could be decreased (new new value should be established experimentally). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Provide tick counter and frequency reference for Intel core architectureVadim Bendebury2012-12-06-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some u-boot modules rely on availability of get_ticks() and get_tbclk() functions, reporting a free running clock and its frequency respectively. Traditionally these functions return number and frequency of timer interrupts. Intel's core architecture processors however are known to run the rdtsc instruction at a constant rate of the so called 'Max Non Turbo ratio' times the external clock frequency which is 100MHz. This is just as good for the timer tick functions in question. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Issue SMI to finalize Coreboot in final stageDuncan Laurie2012-12-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will write magic value to APMC command port which will trigger an SMI and cause coreboot to lock down the ME, chipset, and CPU. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Fix MTRR clear to detect which MTRR to useDuncan Laurie2012-12-06-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Coreboot was always using MTRR 7 for the write-protect cache entry that covers the ROM and U-boot was removing it. However with 4GB configs we need more MTRRs for the BIOS and so the WP MTRR needs to move. Instead coreboot will always use the last available MTRR that is normally set aside for OS use and U-boot can clear it before the OS. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2025-04-30 21:36:10 +0000