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* MLK-14792 mx6ull: Disable WDOG3 after initYe Li2017-05-10-1/+1
| | | | | | | Need to power down WDOG3 for mx6ull, otherwise the kernel will reboot once the iomux for WDOG_ANY pin is configured. This is missed in community u-boot. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14839-2 imx: clean up print info for thermal and reset causeYe Li2017-05-09-3/+4
| | | | | | | Clean up the print info, so that the reset cause print can display in a new line. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14839-1 mx6: Fix wrong CPU frequencyYe Li2017-05-09-1/+1
| | | | | | Fix incorrect value for 696MHz CPU frequency on i.MX6UL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14775 mx7dsabresd: Disable USDHC2 in device treeYe Li2017-05-08-1/+1
| | | | | | | | | | | The USDHC2 is connecting to BT/WIFI chip on SDB board, this controller is enabled in device tree as SDIO, but USDHC driver in u-boot will use it as SDHC. So totally 3 USDHC devices will be created, and cause run time MMC environments go wrong because it only supports USDHC1 and USDHC3. So disable the unused USDHC2 controller in u-boot device tree. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14831 mx6: Fix wrong bmode value used for usb bootYe Li2017-05-08-1/+1
| | | | | | | Wrong bmode value is used in community u-boot for usb reboot. And cause it failed. Fix this by using a reserved bootcfg value. Signed-off-by: Ye Li <ye.li@nxp.com>
* MXSCM-292-3 mx6sxscm: add dts files for EVB boardJuan Gutierrez2017-04-28-1/+1185
| | | | | | | Copy the dts files from kernel for MX6SXSCM EVB board for preparing enabling the OF_CONTROL. Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-292-2 mx6sxscm: convert to enable OF_CONTROL and DM driversJuan Gutierrez2017-04-28-0/+9
| | | | | | | | | | | | | Update mx6sxscm boards code and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Update PMIC and LDO by-pass codes for DM PMIC 3. Add lpddr2 512MB size and eMMC options tolocal Kconfig 4. Update license with NXP 2017 5. Add defconfigs for EVB boards Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-290-3 mx6dqscm: add dts files for qwks boardsJuan Gutierrez2017-04-28-1/+1057
| | | | | | | Copy the dts files from kernel for qwks boards for preparing enabling the OF_CONTROL. Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-290-2 mx6dqscm: convert to enable OF_CONTROL and DM driversJuan Gutierrez2017-04-28-0/+8
| | | | | | | | | | | | | | | Update mx6dqscm boards code and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Enable USB DM driver 3. Update PMIC and LDO by-pass codes for DM PMIC 4. Add spinor boot support 5. Add lpddr2 modes, sizes and boards on local Kconfig 6. Update license with NXP 2017 7. Add defconfigs for qwks boards Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MLK-14693 mx7ulp: Change PLL rate calculation to avoid div 0Ye Li2017-04-14-2/+8
| | | | | | | | | | | | | The new ROM patch will set DENOM and NUM of APLL and SPLL to 0 to workaround PLL issue. When DENOM is 0, the PLL rate calculation will divide 0 and raise a signal. raise: Signal # 8 caught To avoid such problem, we change our calculation. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit f28cf489e1b3864bac6bae4944d8a73bab30ec32)
* MLK-14689 mx7ulp: Workaround APLL PFD2 to 345.6MhzYe Li2017-04-14-2/+2
| | | | | | | | | | The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e931d534fd68e0e639082766de17a20e705fd908)
* MLK-14445-12 mx7ulp_evk: Fix dts building for eMMCYe Li2017-04-06-0/+1
| | | | | | Missed to add eMMC dts file to Makefile Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13499 imx6sll: add epdc splash screen supportRobby Cai2017-04-06-1/+3
| | | | | | | | | add splash screen feature for epdc. it's tested on imx6sll arm2 board and evk board. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit c85c6f2a0f08dfc6c2859fe969b2021ab32b9370) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14605 mx7ulp: Modify the lpi2c seq numberYe Li2017-04-05-4/+4
| | | | | | | | Change the i2c alias seq number to align with device index. So in lpi2c driver we don't need to add 4 to get the device index. This codes may not valid on other platforms. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14506-2 HAB: Disable CAAM driver for SoC using DCPYe Li2017-04-05-1/+1
| | | | | | | The MX6SL, SLL and ULL have DCP to replace CAAM in SoC. We have to disable the CAAM driver for them. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issueYe Li2017-04-05-2/+6
| | | | | | | | The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865)
* MLK-14417 imx: Enable ACTLR.SMP bit for all i.MX cortex-a7 platformsYe Li2017-04-05-7/+40
| | | | | | | | | | | | According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit is set to 1 before the caches and MMU are enabled, or any cache and TLB maintenance operations are performed". ROM sets this bit in normal boot flow, but when in serial download mode, it is not set. Here we add it in u-boot as a common flow for all i.MX cortex-a7 platforms, including mx7d, mx6ul/ull and mx7ulp. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 14990af03450f3e1898135c86fd8b93328007617)
* MA-9213 imx: mx7ulp-evk: Add android supportSanshan Zhang2017-04-05-0/+45
| | | | | | | | | | | Add android features on i.MX7ULP EVK board. Implement the code to get boot device and the serial number on mx7ulp. TODO: will add the code which check misc partition after porting BCB. Change-Id: I9d06fecba303fa4dfdcaf73da1b6246444697bba Signed-off-by: Sanshan Zhang <sanshan.zhang@nxp.com> (cherry picked from commit 4c60cba3a017b921aebb84dd1268c898e549c99a) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12527-2 android: Add FSL android fastboot supportYe Li2017-04-05-0/+175
| | | | | | | | | | | | | | | | | | | | | | Integrate the FSL android fastboot features into community's fastboot. 1. Use USB gadget g_dnl driver 2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and EFI partitions are not support by i.MX. 3. Add FDT support to community's android image. 4. Add a new boot command "boota" for android image boot. The boota implements to load ramdisk and fdt to their loading addresses specified in boot.img header, while bootm won't do it for android image. 5. Support the authentication of boot.img at the "load_addr" for both SD and NAND. 6. We use new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot with relevant header file "fsl_fastboot.h". While disabling the configuration, the community fastboot is used. 7. Overwrite the cmdline in boot.img by using bootargs saved in local environment. 8. Add recovery and reboot-bootloader support. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 23d63ff185929fff5e392efc853d69b606ba081a)
* MLK-12527-1 mxc_keyb: Add MXC keyboard driverYe Li2017-04-05-0/+38
| | | | | | | | | | | | | | | The i.MX6SL EVK needs this driver in android fastboot support. Add this driver to u-boot. To use the driver, user must define: CONFIG_MXC_KPD Enable the driver CONFIG_MXC_KEYMAPPING Key mapping matrix CONFIG_MXC_KPD_COLMAX The column size of key mapping matrix CONFIG_MXC_KPD_ROWMAX The row size of the key mapping matrix Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5096e572667ff41217deb4ba9b1bd15e93fa6b59)
* MLK-14497 mx6/mx7: DTS: Update dtsi file to add usb aliasYe Li2017-04-05-0/+7
| | | | | | | | After changed to USB DM driver, the framework uses the seq to find usb device when registering a gadget driver. We have to add usb0 alias in all i.MX6 and i.MX7 dtsi, otherwise the gadget driver register will fail. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14484-3 mx7ulp_arm2: Convert to use OF_CONTROLYe Li2017-04-05-1/+139
| | | | | | | | | | Add the 10x10 ARM2 and 14x14 ARM2 DTS files. Also convert the board codes to use OF_CONTROL and DM drivers. Since the DTS files only have UART and SD1 supported. So we only enable the DM for these two modules. QSPI and USB are still kept in non-DM fashion. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14484-2 mx7ulp_arm2: Add 10x10 and 14x14 ARM2 codesYe Li2017-04-05-0/+9
| | | | | | | | | | | | | Copy the mx7ulp ARM2 codes from v2016.03 as the base for using OF_CONTROL and DM drivers. The 14x14 ARM2 LPDDR3 script is v1.5: - IMX7ULP1_LPDDR3_320MHz_512MB_32bit_V1.5.inc The 10x10 ARM2 LPDDR2 script is v1.1: - IMX7ULP1_LPDDR2_320MHz_1GB_32bit_V1.1.inc Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14445-9 mx7ulp_evk: Add eMMC reworked board supportYe Li2017-04-05-0/+18
| | | | | | | | | Add build configuration and DTS file to enable eMMC for eMMC reworked EVK board. Because the eMMC DTS file has QSPI node disabled, so we change to use non-DM QSPI driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14445-7 DTS: mx7ulp: Add PTA and PTB two GPIO banksYe Li2017-04-05-4/+22
| | | | | | | | | | | | | | | | PTA and PTB banks are at M4 domain, but some boards like ARM2 use them for controlling A7 domain modules. So we may need to support them in GPIO driver. In the imx_rgpio2p driver, the non-DM driver supports full 6 GPIO banks, with PTA from index 0. But the DM driver which uses DTB only have 4 GPIO banks, with PTC from index 0. This will cause problem when using GPIO. So this patch add PTA and PTB banks to DTB, and reorder the sequence for gpio with PTA from index 0. So the non-DM driver and DM driver are aligned. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14312 mx7ulp: Fix incorrect DTB modification after using USBYe Li2017-04-05-3/+51
| | | | | | | | | | | | | | u-boot has feature that when booting for mfgtool, the u-boot will modify the DTB to disable SD 1.8v switch. But the judgement for mfgtool boot has a problem, it only checks whether the USB PHY power status is enabled. When a USB device (for example a USB ethernet) is used in u-boot, the power status is also enabled. So the u-boot incorrectly disable the SD 1.8v switch. The patch changes the get_boot_device to use the boot SW info provided by ROM. Only if it is a USB boot, we will start the DTB modification for SD. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1fb61cd80af59c39d1ca01d833f566628ba48f32)
* MLK-13929-6 mx7ulp_evk: Enable the MIPI DSI splashscreenYe Li2017-04-05-1/+2
| | | | | | | | Enable and setup board level codes for MIPI DSI splashscreen on EVK board. User needs set env variable"panel=HX8363_WVGA" for displaying. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 49cb68f5c17e42f9290336e1252ace6ac7d0b5ce)
* MLK-13929-5 mx7ulp: Update clock and SoC functions for videoYe Li2017-04-05-0/+88
| | | | | | | | | Add the clocks functions for enabling LCDIF and DSI clocks. Also add the arch_preboot_os to disable the video before enter into the kernel. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit a783799017a929f9918c9c5981fe3a7a25cd8125)
* MLK-13929-4 mx7ulp: Update registers and memory map for DSI and LCDIFYe Li2017-04-05-4/+14
| | | | | | | | Update the registers base address and LCDIF registers structure for mx7ulp. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 29a2032fc0c2330718dbab1f96c1201ae5b49b6f)
* MLK-14445-4 mx7ulp: Fix wrong i2c configuration nameYe Li2017-04-05-2/+2
| | | | | | | Wrong I2c driver configuration name is used in codes, so I2c driver is not built. Correct it. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14445-2 mx7ulp_evk: Add QSPI flash supportYe Li2017-04-05-1/+49
| | | | | | | | | Porting the QSPI flash board support from v2016.03, and convert to use DM QSPI driver. Since we need to support QSPI at default in u-boot, change the default DTS file to qspi enabled DTS. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14445-1 mx7ulp: Add CONFIG_MX7ULP to kconfigYe Li2017-04-05-0/+4
| | | | | | | Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13923 mx7ulp: Fix PCC register bits mask and offset issueYe Li2017-04-05-2/+2
| | | | | | | | The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we can't get the right frequency. Fix them to correct value. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 079db9559c06c5e68ab8f6cd67ec4f5115dd2d59)
* MLK-13899 ARM: mx7ulp: Correct the clock index on imx7ulpBai Ping2017-04-05-1/+2
| | | | | | | | | On i.MX7ULP, value zero is reserved in SCG1 RCCR register, so the val should be decreased by 1 to get the correct clock source index. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 7c9a3573ec0191f1e0bea12956346a5eab2db43a)
* MLK-13761 board: imx7ulp: Fix system reset after a7 rtc alarm expired.Bai Ping2017-04-05-0/+7
| | | | | | | | | The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 5aa5974f487e0b4c2e963a86203161c5f05e2fdf)
* MLK-13645 mx7ulp: Modify FDT file to disable SD3.0 for mfgtoolYe Li2017-04-05-0/+38
| | | | | | | | | | Since the SD3.0 kernel driver needs M4 image support, this causes problem to mfgtool. To decouple the relationship, we modify the FDT file in u-boot to disable SD3.0 when booting for mfgtool. So the kernel won't depend on M4 image. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit 1826d6e4dc732521190c742f812193be95eea211)
* MLK-13525-1 mx7ulp: Add common plugin codes for mx7ulpYe Li2017-04-05-1/+106
| | | | | | | | Add common plugin codes to call ROM's hwcnfg_setup and generate IVT2 header. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 58ffe85c25ff554c185d8f6fd8b6443f167227da)
* MLK-13450-7 mx7ulp: Add M4 core boot support when using single boot modeYe Li2017-04-05-0/+75
| | | | | | | | | | | | | | | | | | | The single boot mode in MX7ULP will only boot up A7, the M4 is running in ROM by checking entry from SIM0 GP register. In this patch, We bind M4 image with u-boot.bin by allocating a section for m4 image. So the whole image (included M4 image) will be loaded by A7 ROM into DDR. Then when u-boot is up, it will try to load M4 image into TCML and boot it there. Since M4 image will not be relocated in u-boot codes, we must load it during board_f. Current implementation put it in arch_cpu_init to get M4 booted as quick as possible. We requires the M4 image with IVT head and padding embedded, not a RAW binary. The image should be same as what is used for M4 QSPI boot in dual boot mode. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 04163dbd4f6190f310fff17b53b4bc7b8370ba89)
* imx: imx7ulp: add EVK board supportPeng Fan2017-04-05-0/+482
| | | | | | | | | | | | | | | | | | | | | | | | Add EVK board support. Add the evk dts file. LOG: U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800) CPU: Freescale i.MX7ULP rev1.0 at 500 MHz Reset cause: POR Boot mode: Dual boot Model: NXP i.MX7ULP EVK DRAM: 1 GiB MMC: FSL_SDHC: 0 In: serial@402D0000 Out: serial@402D0000 Err: serial@402D0000 Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* arm: dts: add i.MX7ULP dtsi filePeng Fan2017-04-05-0/+1480
| | | | | | | | Add i.MX7ULP dtsi file. Add clock and pinfun header files. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mx7ulp: Add HAB boot supportPeng Fan2017-04-05-1/+21
| | | | | | | | | | | | Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF size for HAB support boot on mx7ulp. Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build secure uboot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* serial: lpuart: restructure lpuart driverPeng Fan2017-04-05-110/+6
| | | | | | | | | | | | | | | | Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
* i2c: lpi2c: add lpi2c driver for i.MX7ULPPeng Fan2017-04-05-0/+520
| | | | | | | | | | | Add lpi2c driver for i.MX7ULP. Need to enable the two options to use this driver: CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mx7ulp: Add iomux pins header fileYe Li2017-04-05-0/+910
| | | | | | | | | | | | | Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins to add IOMUX_CONFIG_MPORTS flags. Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address to aligin with it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULPPeng Fan2017-04-05-0/+2
| | | | | | | | | | | | | Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* gpio: Add Rapid GPIO2P driver for i.MX7ULPPeng Fan2017-04-05-0/+22
| | | | | | | | | | | | | | | | | Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP. Have added all ports on RGPIO2P_0 and RGPIO2P_1. The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set to y to enable the drivers. To use the GPIO function, the IBE and OBE needs to set in IOMUXC. We did not set the bits in driver, but leave them to IOMUXC settings of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number for gpio APIs access. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Implement the clock functions for i2c driverYe Li2017-04-05-0/+44
| | | | | | | | | Implement the i2c clock enable and get function for mx7ulp. These functions are required by imx_lpi2c driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add soc level initialization codes and functionsPeng Fan2017-04-05-2/+268
| | | | | | | | | | | | | | | Implement soc level functions to get cpu rev, reset cause, enable cache, etc. We will disable the wdog and init clocks in s_init at very early u-boot phase. Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev is hard coded to a fixed value. This may change in future. Reuse some code in imx-common. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: Add clock framework and functionsPeng Fan2017-04-05-1/+2441
| | | | | | | | | | | | | | | | | | Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set clock source, divider, clock rate and parent source. Users need to include pcc.h to use the APIs to for peripherals clock. Each peripheral clock is defined in enum pcc_clk type. SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD enablement and settings, and all SCG clock initialization. User need use enum scg_clk to access each clock source. In clock.c, we initialize necessary clocks at u-boot s_init and implement the clock functions used by driver modules to operate clocks dynamically. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1Peng Fan2017-04-05-0/+173
| | | | | | | | | | | | Add a new driver under ULP directory to support its IOMUXC controllers. The ULP has two IOMUXC, the IOMUXC0 is used for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as the default IOMUX in this driver. Any pins in IOMUXC0 needs to configure with IOMUX_CONFIG_MPORTS in its mux_mode field. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
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