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* ppc4xx: Only define DDR2 registers for the correct PowerPC variantsStefan Roese2010-07-23-4/+4
| | | | | | | Make sure that some SDRAM/DDR2 registers are only defined for the PPC variants really implementing those registers. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add CONFIG_DDR_RFDC_FIXED to allow board specific RFDC valuesStefan Roese2010-07-23-0/+12
| | | | | | | | Using this define, a board can define an opimized RFDC value and use the auto calibration code to "tune" the remaining DDR2 controller calibration register. Signed-off-by: Stefan Roese <sr@denx.de>
* Drop support for GTH boardWolfgang Denk2010-07-17-2/+1
| | | | | | | | | | | | | | | The board maintainer states: The GTH board is obsolete and has not been manufactured for several years. To my knowledge, no recent U-Boot build has been tested on that card. So drop support for this board. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Acked-by: Thomas Lange<thomas@corelatus.se>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-07-16-516/+751
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| * powerpc/85xx: Move p1022ds slot code into board fileKumar Gala2010-07-16-70/+0
| | | | | | | | | | | | | | | | The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add command to report errata workaroundsKumar Gala2010-07-16-0/+52
| | | | | | | | | | | | | | | | | | Add 'errata' command to report what errata we workaround. Report workaround for erratum SATA-A001 on P1022/P1013. Also sorted the CONFIG_CMD_* list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc: add support for the Freescale P1022DS reference boardTimur Tabi2010-07-16-0/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl: add LAW target to fsl_pci_info structureTimur Tabi2010-07-16-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that we can capture the LAW target for a given PCI or PCIE controller. Also update the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure. This will allow future PCI[E] code to configure the LAW target automatically, rather than requiring each board to it for each PCI controller separately. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for link stack & STAC on e5500Kumar Gala2010-07-16-1/+3
| | | | | | | | | | | | | | | | The e5500 has a link register stack and segment target address cache. Its safe to enable these bits on older e500 cores as the bits are implemented in the register. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add recognition of e5500 coreKumar Gala2010-07-16-10/+18
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc 83xx/85xx: Merge lbc upmconfig codeBecky Bruce2010-07-16-127/+53
| | | | | | | | | | | | | | | | | | | | Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: Add reginfo commandBecky Bruce2010-07-16-0/+13
| | | | | | | | | | | | | | | | The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/misc/fsl_law.c: Rearrange code to avoid duplicationBecky Bruce2010-07-16-0/+1
| | | | | | | | | | | | | | | | The current code redefines functions based on FSL_CORENET_ vs not - create macros/inlines instead that hide the differences. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: Add print_tlbcam() functionBecky Bruce2010-07-16-0/+21
| | | | | | | | | | | | | | This dumps out the contents of TLB1 on 85xx-based systems. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: tlb.c cleanupsBecky Bruce2010-07-16-26/+25
| | | | | | | | | | | | | | | | | | | | | | Extract the operation to read a tlb into a function - we will need this later to print out the tlbs, and there's no point in duplicating the code. Create a TSIZE_TO_BYTES macro to deal with the conversion from the MAS field to an actual size instead of duplicating this in code. There are a few misc other minor cleanups. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-339/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtbKumar Gala2010-07-16-7/+50
| | | | | | | | | | | | | | If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc8xxx: Remove cpu-handles for cpus we deleteKumar Gala2010-07-16-6/+30
| | | | | | | | | | | | | | We may have cpu-handles pointing to the cpu nodes we delete. If so we should delete the handles as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Add base support for the SEC4Kim Phillips2010-07-16-1/+47
| | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Distinguish between incompatible SEC h/w typesKim Phillips2010-07-16-3/+10
| | | | | | | | | | | | | | | | | | CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fdt: move fsl specific code from common fdt area to mpc8xxx/fdt.cKim Phillips2010-07-16-3/+137
| | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-07-15-7/+451
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| * | PXA: Add support for LMS285GF05 into pxafbMarek Vasut2010-07-14-0/+34
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Voipac PXA270 LCD SupportMarek Vasut2010-07-14-0/+33
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add OneNAND booting support to start.SMarek Vasut2010-07-14-5/+43
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add PWM2 and PWM3 regs to pxa-regs.hMarek Vasut2010-07-14-1/+9
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add hardware init helper macrosMarek Vasut2010-07-14-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds macros for the following purposes: - GPIO configuration - SDRAM configuration - Wakeup - Clock configuration - Interrupt controller configuration These macros are intended to replace numerous copies of the same code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Enable PXAFB for PXA27X and PXA3XXMarek Vasut2010-07-14-1/+8
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* | Merge branch 'master' of ../masterWolfgang Denk2010-07-15-229/+4355
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| * Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-07-14-0/+30
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| | * nios2: add gpio_requestThomas Chou2010-07-12-0/+6
| | | | | | | | | | | | | | | | | | | | | This will be used by nand_plat. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| | * nios2: add fdt supportThomas Chou2010-07-12-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds fdt support to boot linux, followed Michal's work on microblaze. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| | * nios2: use gc sections to reduce image sizeThomas Chou2010-07-12-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size. Configuring for nios2-generic board... Before, text data bss dec hex filename 123979 3724 22892 150595 24c43 /tmp/u-boot/u-boot After, text data bss dec hex filename 115983 3800 22732 142515 22cb3 /tmp/u-boot/u-boot Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-07-14-13/+35
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| | * | mpc8308: support for Freescale MPC8308 cpuIlya Yanok2010-07-09-13/+35
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for Freescale MPC8308 CPU. Serial ports, NOR flash and integrated Ethernet controllers are supported. PCI Express is also supported. eSDHC, NAND and USB may work but aren't tested (using ULPI PHY requires additional patch). Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2010-07-14-2/+19
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| | * | mvgbe: add support for orion5x GbE controllerAlbert Aribaud2010-07-12-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add definitions and initialization in orion5x for mvgbe. Add orion5x in mvgbe SoC includes. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| | * | mvgbe: support SoCs other than kirkwoodAlbert Aribaud2010-07-12-2/+5
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Rename all references to kirkwood in mvgbe symbols throughout the whole codebase. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Blackfin: bf561: use DMA for Core B L1 regionsMike Frysinger2010-07-13-1/+9
| | | | | | | | | | | | | | | | | | | | | The L1 regions of Core B are not directly accessible from Core A, so we need to use DMA to get at them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: serial: convert to portmux frameworkMike Frysinger2010-07-13-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Use the new portmux framework to handle the details when possible. Unfortunately, we cannot yet use this in the standalone initialization logic, so we need to keep around the old portmux writes for now. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: unify custom gpio commandsMike Frysinger2010-07-05-0/+121
| | | | | | | | | | | | | | | | | | | | | Now that we have a unified gpio layer, the misc partial gpio commands can be unified and made complete (support all possible gpios). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: import gpio/portmux layer from LinuxMike Frysinger2010-07-05-0/+3561
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current pinmux handling has spread throughout Blackfin drivers and board code and is getting hideous to maintain. So import the gpio and portmux layer from the Blackfin Linux code. This should spur a serious of cleanups across the Blackfin tree. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: set up simple NMI handlers for anomaly 05000219Mike Frysinger2010-07-05-1/+34
| | | | | | | | | | | | | | | | | | | | | Older on-chip Blackfin bootroms do not create a dummy NMI handler, so set up one ourselves when anomaly 05000219 applies. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: update anomaly lists to latest sheetsMike Frysinger2010-07-05-183/+437
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: expand EVT1 usage documentation a bit moreMike Frysinger2010-07-05-1/+6
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: implement bootcount supportMike Frysinger2010-07-05-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | The default storage location for bootcount is EVT0. This version uses one 32bit value and combines the magic/count value in the upper/lower 16bits. If there is demand for more, should be easy to do. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: clean up trace buffer handling when crashingMike Frysinger2010-07-05-28/+49
| |/ | | | | | | | | | | | | | | | | | | Avoid banging on the trace MMRs when debugging is disabled, avoid calling the funcs multiple times in a row, disable the trace buffer earlier in the exception handler to avoid eating more user entries, and dump the buffer before calling the kgdb hook. This way we maximize useful debugging info up front rather than needing external tools (like gdb/serial/etc...). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | ARMV7: Restructure OMAP i2c driver to allow code sharing between OMAP3 and OMAP4Steve Sakoman2010-07-05-145/+78
| | | | | | | | | | | | | | This patch modifies the omap24xx driver so that it will also work with OMAP4. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Restructure OMAP mmc driver to allow code sharing between OMAP3 and OMAP4Steve Sakoman2010-07-05-242/+171
| | | | | | | | | | | | | | | | The architecture independent header is moved to drivers/mmc, and the architecture dependent headers reside in asm/arch-omap3 and asm/arch-omap4 Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Add basic support for TI OMAP4Steve Sakoman2010-07-05-2/+573
| | | | | | | | | | | | | | | | | | This patch adds minimum support for OMAP4. Code which can be shared between OMAP3 and OMAP4 is placed in arch/arm/cpu/armv7/omap-common Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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