| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
| |
Implement the i2c clock enable and get function for mx7ulp. These
functions are required by imx_lpi2c driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
| |
Add imx-regs.h for i.MX7ULP registers addresses definitions and some
registers structures.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
|
| |
i.MX7ULP is a new series SoC which has different architecture
from previous i.MX platforms. Create a new cpu folder for it,
and add it to Kconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
|
|
|
| |
Add 19x19 LPDDR2/LPDDR3/DDR3 ARM2 board supports.
Enable the OF_CONTROL and convert them to use DM driver. Since the DTB lacks
the support for some modules. We have to use QSPI and FEC with non-DM driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Add 12x12 ddr3 arm2 board support and convert it to use OF_CONTROL and
DM drivers.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Add mx7d 12x12 lpddr3 arm2 support, which has enabled the OF_CONTROL
and DM drivers
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
| |
Add nand/qspi build configurations for their boot support.
Also Add gpmi-nand and qspi specified DTS files for enable them.
For QSPI, this patch changes it to use DM driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Add epdc support from v2016.03.
Add a epdc specified DTS file for using epdc
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
| |
Enable dtb support for mx7dsabresd board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
|
|
|
|
|
| |
Introduce dts files for i.MX 7D SabreSD platform.
From imx_4.1.y, based on "commit b423f954fb755"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
|
|
|
|
|
|
| |
This EPDC/EPXP QoS setting is needed for EPDC stress test to pass.
Signed-off-by: Robby Cai <r63905@freescale.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 1b32518d1c27f05eb84a4cb93594710354b2e343)
|
|
|
|
|
|
|
|
|
| |
Modify the mx6qarm2 configurations to enable OF_CONTROL and DM drivers:
USB, Ethernet, UART and MMC.
Add two DTS files for imx6q/dl arm2 board and imx6q pop arm2 board.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Copy the DTS files from kernel for 14x14/17x17/19x19 ARM2 board for
preparing enabling the OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Copy the board codes and build configurations for i.MX6SX 14x14/17x17/19x19
ARM2 boards from v2016.03 as the base for converting to OF_CONTROL and
DM driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Copy the DTS files from kernel for LPDDR2/3 ARM2 board for preparing enabling
the OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
| |
Copy the DTS files from kernel for DDR3 ARM2 board for preparing enabling
the OF_CONTROL.
Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using
DM SPI driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Add the modules disable fuses mapping with FDT nodes and devices name.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit d033825f034467fa9c9aeff6fcf95a146c802cf1)
|
|
|
|
|
|
|
|
| |
add splash screen feature for epdc.
it's tested on imx6ull arm2 board.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit bcdbe240bb2a97d38ba30dd244a51ece87662b06)
|
|
|
|
|
|
|
| |
Move the mx6ull ddr3 arm2 board codes and defconfigs from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
| |
Copy the DTS files from kernel for DDR3 ARM2 board and LPDDR2 ARM2 board
preparing for enabling OF_CONTROL.
Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using
DM SPI driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Move the mx6ul DDR3/LPDDR2 ARM2 boards codes from v2016.03 u-boot as
the base for OF_CONTROL enabling.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
| |
Update i.MX6ul dtsi file and add mx6ul 14x14 and 9x9 evk DTS file
to latest in kernel.
To support DM QSPI driver, modify the DTS files with adding a spi0
alias for qspi node and changing the the n25q256a flash node's compatible
to "spi-flash"
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
| |
Update i.MX6SLL dtsi file and mx6sll-evk DTS file to latest in kernel.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Update i.MX6SL dtsi file and dt-binding header files.
Add the imx6sl-evk DTS file preparing for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Copy the imx6sx-sdb latest DTS file from imx_4.1.y kernel.
To support DM QSPI driver, modify the n25q256a flash node's compatible
to "spi-flash".
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Update i.MX6SX dtsi file and relevant DTS header files.
Add the imx6sx-sdb DTS files preparing for using DTB.
To support DM QSPI driver
1. Modify the n25q256a flash node's compatible to "spi-flash".
2. Add spi0 and spi1 alias for qspi1 and qspi2.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Update mx6qpsabreauto build configurations to use OF_CONTROL and DM driver.
Also add the imx6qpsabreauto DTS file for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Update mx6dl/solosabreauto build configurations to use OF_CONTROL and DM driver.
Also add the imx6dlsabreauto DTS file for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Enable OF_CONTROL and DM driver on mx6qsabreauto.
1. Add the imx6qsabreauto relevant DTS file for using DTB.
2. Modify PMIC initialization codes to use DM PMIC driver.
3. Modify to use PCA953X DM driver
4. Remove NAND from default, since the default imx6q-sabreauto.dts disabled
the nand. The pins are conflicted with UART3, while UART3 is enabled.
5. For NAND build configuration, remove the USB, since the imx6q-sabreauto-gpmi-weim.dts
will have pin conflicts on steer logic.
6. GPIO requests added.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Enable OF_CONTROL and DM driver on mx6dlsabresd. And add the imx6dl
sabresd DTS file for using DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
Since we have enabled the i.MX6QP sabresd board with OF_CONTROL and DM
driver. Add the imx6qp DTS file and imx6qp sabresd DTS file for build.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1. Add build configs for i.MX6ULL 9X9 EVK. Enable DM I2C driver and
DM PMIC driver for pfuze3000. Convert power init codes to use
DM PMIC driver.
2. Add lpddr2 script IMX6ULL_9X9_LPDDR2_400MHz_16bit_V1.2.inc for
the 9x9 board.
Refer the commit 44a84b44a84cd1bdcc54d722987e5f109510891b
3. Add DTS file for 9x9 evk board.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
| |
To support boot from QSPI/NAND/eMMC, add relevant DTS files and
build configurations.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Update mx6ull evk to add features from v2016.03.
1. Add support for NAND flash.
2. Add support for QSPI DM driver.
3. Add USB DM driver support.
4. Add two FEC support by using DM FEC driver
5. Update environments for various boot devices support: SD/NAND/eMMC/QSPI
6. Add MFGtool environments.
7. Add board codes for 9x9 EVK board
For the DTS file, some changes are needed for using QSPI DM driver
1. Add spi0 alias for qspi node. Which is used for bus number 0.
2. Modify the n25q256a@0 compatible property to "spi-flash".
3. Modify spi4 (gpio_spi) node to spi5
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Define CONFIG_MX6QP which will also set CONFIG_MX6Q, otherwise
plugin code will use wrong ddr script.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 901d9eb01736ab54822678a197fe1aeb281a81b9)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This is a demo that CM4 will boot up by u-boot without typing any
command. It boots up at u-boot early init, try to minimize the time
from power up to the CM4 running.
Since CM4 runs on QSPI NOR XIP, we have to disable the QSPI driver in
u-boot to avoid conflict.
RDC for shared GPIO1 is added, but not enabled, because the kernel is
not ready for shared GPIO1. Users can uncomment the CONFIG_IMX_RDC to
enable it.
Some legacy codes in mx6sxsabreauto are removed. We only need this work
on mx6sxsabresd as a demo.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit f66842f79d4e33ace45762466eed23a86d367642)
|
|
|
|
|
|
|
|
|
|
| |
Add support for various boot devices like NAND, QSPINOR, SPINOR,
eMMC, EIMNOR, SATA.
Modify board level files to support the feature and add corresponding defconfig files
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 72c35e80b86f7f75a52db45959793882bb730793)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Port LDO bypass support from v2015 to support the features:
1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
on the flatten device tree file.
2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now
on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to
reboot whole board, so split these code to independent function so that board file
can call it freely.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5b87d04dba66fa45375d59648838ef89f559f75d)
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Since there is already CONFIG_MX6S used for i.MX6 SOLO in u-boot codes,
we don't need to add new CONFIG_MX6SOLO. Rename the existing CONFIG_MX6SOLO
to CONFIG_MX6S.
Additional, for CONFIG_MX6S, we should select CONFIG_MX6DL. The major difference
for these two chips are core number and DDR controller. So all duallite
relevant definitions can apply to solo. User can combine the two configs
if any code only apply to solo or duallite.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The issue on the i.MX7D is that, there is one cache-able memory access
between the L1 and L2 cache flush by calling the flush_dache_all->
v7_maint_dcache_all() [Flush L1 and L2 cache) which written in the C code.
L1-cache-flush -> This will flush L1 cache to L2 cache in the end.
Cache-able memory access -> This will have the chance cause the L1 line-fill
with dirty data from L2 cache(L1 cache-line dirty,
L2 clean)
L2-cache-flush -> This will only flush L2 cache to L3, but still
some dirty data on the L1 cacheline.
After C & M bit clean, -> The dirty data on the L1 cache line lost, which will
cause memory coherent issue if that dirty cache line
has some useful data
The only problem here is: there is one cache-cable memory access between L1 and L2 cache flush.
This patch should works fine on the i.MX6 and i.MX7.
The second cache flush have zero impact on the i.MX6, but this is really need for
the i.MX7D platform due to the L1 line-fill during the first dcache_flush.
And the second flush will not bring in the L1 dirty cache line due to the C bit is
clear now, which means the dcache is disabled.
Acked-by: Jason Liu<r64343@freescale.com>
Reviewed-by: Jason Liu<r64343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit f5d5f07fba936c4bb05c887de9d72fb75b3dc0f2)
(cherry picked from commit 86c784cf4c4b633d37a76de7d47155c08f75dc82)
(cherry picked from commit d85cd484e6825631aa1ab572e5e0539f2191d795)
(cherry picked from commit 2b29c1873c2293abe1c4b361392521223b9c9ecf)
|
|
|
|
|
|
|
|
| |
Update CCM macros for i.MX6SLL.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye.Li <ye.li@nxp.com>
(cherry picked from commit f735f8ac328aa49759f6db524f7c2ba32622f711)
|
|
|
|
|
|
|
| |
Update soc settings for i.MX6SLL.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit afa2d78f2b799337eae3dc67c0ed702d5520eee6)
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
If boot from usb, reset environment to default value.
Auto apply mfgtools setting and boot mfgtools kernel.
Porting this from fsl uboot to uboot 2016.
The 7dsabresd has already added the environment and usb boot
related functions. No need to add them more. Only need to add
NAND parts environment for mfgtools.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit a352ed3c5184b95c4c9f7468f5fbb5f43de5e412)
|
|
|
|
|
|
|
| |
Add NAND pinmux settings, clock setting and related configurations.
Default not enabled, need hardware rework.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
|
|
| |
Fix runtime checking for i.MX6ULL. Add is_cpu_type(MXC_CPU_MX6ULL)
to avoid using wrong code path.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 05922b0abf848949df778c19312cb1cf7fdfbe6a)
|
|
|
|
|
|
|
|
| |
Change to use #ifdef not the IS_ENABLED, because we will get build warning
when the CONFIG_IMX_RDC is not set.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit a212eff242efb8dc171479cbaca34049d508f87b)
|