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* disk: convert CONFIG_DOS_PARTITION to KconfigPatrick Delaunay2017-01-28-2/+0
| | | | | Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
* Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-01-26-0/+67
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| * arm64: mvebu: Armada 7040-db: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada 7040-db dts file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi file which is used by the Armada 7k/8K SoCs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 3720-db: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada 3700-db dts file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 3700: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada 3700 dtsi file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
* | Merge git://git.denx.de/u-boot-mpc85xxTom Rini2017-01-25-3/+30
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| * | powerpc: Enable flush and invalidate dcache by range for MPC85xxTony O'Brien2017-01-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ac337168a unified functions to flush and invalidate dcache by range. These two functions were no-ops for SoCs other than 4xx and MPC86xx. Adding these functions seemed to be correct but introduced issues in some drivers when the dcache was flushed. While the root cause was under investigation, these functions were disabled in Commit cb1629f91a for affected SoCs, including the MPC85xx, to make the various drivers work. On the T208x USB stopped working after v2016.07 was pulled. After re-enabling the dcache functions for the MPC85xx it started working again. The USB and DPPA Ethernet drivers have been seen as operational after this change but other drivers cannot be tested. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz> Cc: Marek Vasut <marex@denx.de> Cc: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun>
| * | mpc85xx: pcie: Implement workaround for Erratum A007815Tony O'Brien2017-01-24-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller. Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz> [York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907Darwin Dingel2017-01-24-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Core hang occurs when using L1 stashes. Workaround is to disable L1 stashes so software uses L2 cache for stashes instead. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz> Cc: York Sun <york.sun@nxp.com> [York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
* | | Drop prt_mpc5xxx_clks() in favour of print_cpuinfo()Simon Glass2017-01-25-1/+1
| | | | | | | | | | | | | | | | | | | | | Rather than having an arch-specific function, use the existing generic one. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | powerpc: Drop CONFIG_SYS_ALLOC_DPRAMSimon Glass2017-01-25-126/+7
| | | | | | | | | | | | | | | | | | This is not defined anywhere in U-Boot. Drop this dead code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | powerpc: Drop probecpu() in favour of arch_cpu_init()Simon Glass2017-01-25-1/+1
| | | | | | | | | | | | | | | | | | | | | To avoid an unnecessary arch-specific call in board_init_f(), rename this function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_ARCH_MISC_INIT to KconfigSimon Glass2017-01-25-2/+9
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_ARCH_MISC_INIT Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_BOARD_EARLY_INIT_F to KconfigSimon Glass2017-01-25-0/+63
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_ARCH_EARLY_INIT_R to KconfigSimon Glass2017-01-25-1/+6
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_ARCH_EARLY_INIT_R Signed-off-by: Simon Glass <sjg@chromium.org>
* | | config: Drop CONFIG_ARCH_DMA_PIO_WORDSSimon Glass2017-01-25-6/+1
| |/ |/| | | | | | | | | This is not defined by any board in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | mach-omap2: Cleanup secure boot media generationAndrew F. Davis2017-01-24-10/+28
| | | | | | | | | | | | | | | | | | | | Currently all secure media types of SPL are generated for all platforms, all platforms do not need all types, only generate the media types valid for each platform. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini2017-01-24-0/+144
| | | | | | | | | | | | | | | | | | This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
* | NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUSTTom Rini2017-01-24-13/+0
| | | | | | | | | | | | | | | | | | Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | imx31_phycore: Split the eet variant out into a different TARGETTom Rini2017-01-24-1/+5
|/ | | | | | | Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and make this a distinct config target. Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: uniphier: add PXs3 SoC supportMasahiro Yamada2017-01-22-0/+27
| | | | | | Initial support for PXs3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add PXs3 SoC/board supportMasahiro Yamada2017-01-22-0/+381
| | | | | | Initial commit for the PXs3 SoC DT. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: compile only DT files that make senseMasahiro Yamada2017-01-22-9/+18
| | | | | | | | | All the UniPhier DT files are compiled if CONFIG_ARCH_UNIPHIER is enabled, but not all of them actually work. For example, when U-Boot is compiled for ARM 32 bit, 64 bit DT files are also built, and vice versa. Compile only the combination that makes sense. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add macro to generate SoC data look-up functionMasahiro Yamada2017-01-22-33/+23
| | | | | | | | There are similar functions that look up SoC data by the SoC ID. The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to avoid the code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: simplify SoC ID get functionMasahiro Yamada2017-01-22-317/+214
| | | | | | | | | | Currently, uniphier_get_soc_type() converts the SoC ID (this is read from the revision register) to an enum symbol to use it for SoC identification. Come to think of it, there is no need for the conversion in the first place. Using the SoC ID from the register as-is a straightforward way. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: replace <common.h> with <linux/delay.h> where possibleMasahiro Yamada2017-01-22-4/+5
| | | | | | | | | The <common.h> includes too many headers. Actually, these files needed to include it for udelay() declaration. Now we can replace it with <linux/delay.h> thanks to commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: replace <linux/err.h> with <linux/errno.h>Masahiro Yamada2017-01-22-14/+16
| | | | | | | | These files only need error number macros. Actually, IS_ERR(), PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid unnecessary header includes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: make SPL optional for ARVv8 SoCsMasahiro Yamada2017-01-22-26/+44
| | | | | | | | | | | | | | | | | | We may want to run different firmware before running U-Boot. For example, ARM Trusted Firmware runs before U-Boot, making U-Boot a non-secure world boot loader. In this case, the SoC might be initialized there, which enables us to skip SPL entirely. This commit removes "select SPL" to make it configurable. This also enables the Multi SoC support for the UniPhier ARMv8 SoCs. (CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and Device Tree, the U-Boot proper part is now written in a generic way. The board/SoC parameters reside in DT. The Multi SoC support increases the memory footprint a bit, but the U-Boot proper does not have strict memory constraint. This will mitigate the per-SoC (sometimes per-board) defconfig burden. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add missing static and const qualifierMasahiro Yamada2017-01-22-3/+3
| | | | | | These are file-internal and constant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix delay fixup code in LD11 UMC initKotaro Hayashi2017-01-22-0/+1
| | | | | | | | | The ddrphy_shift_rof_hws() never writes back the shifted delay value to the register, which makes this function non-effective. Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com> [masahiro: add git log] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: update UMC_MEMMAPSET value for LD20 SoCWataru Okoshi2017-01-22-2/+2
| | | | | | | Change bnk_typ's value from 8 to 0 (for G1's performance). Signed-off-by: Wataru Okoshi <okoshi.wataru@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* status_led: Kconfig migrationUri Mashiach2017-01-21-25/+26
| | | | | | | | | | | | | Move all of the status LED feature to drivers/led/Kconfig. The LED status definitions were moved from the board configuration files to the defconfig files. TBD: Move all of the definitions in the include/status_led.h to the relevant board's defconfig files. Tested boards: CL-SOM-AM57x, CM-T335 Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
* config: Move CONFIG_BOARD_LATE_INIT to defconfigsJagan Teki2017-01-21-4/+0
| | | | | Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* ARM: OMAP5+: Remove unsed dpll structuresLokesh Vutla2017-01-20-55/+4
| | | | | | | | Latest gcc compile strted complaining about defined structure definition that are not used. Remove the unused sturctures. Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: OMAP4: Fix compiler warningLokesh Vutla2017-01-20-1/+3
| | | | | | | | | | | Latest gcc 6.2 compiler is throwing the below warning for omap4_panda_defconfig arch/arm/mach-omap2/omap4/hw_data.c:136:3: warning: 'abe_dpll_params_sysclk_196608khz' defined but not used [-Wunused-const-variable=] abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = { Fix this by guarding it with CONFIG_SYS_OMAP_ABE_SYSCK Reported-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: Default to using optimized memset and memcpy routinesTom Rini2017-01-20-4/+22
| | | | | | | | | | | | | | | | | | | | | | We have long had available optimized versions of the memset and memcpy functions that are borrowed from the Linux kernel. We should use these in normal conditions as the speed wins in many workflows outweigh the relatively minor size increase. However, we have a number of places where we're simply too close to size limits in SPL and must be able to make the size vs performance trade-off in those cases. Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Cc: Heiko Schocher <hs@denx.de> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* mach-omap2: Fix secure boot media generationAndrew F. Davis2017-01-20-5/+1
| | | | | | | | | | | While moving OMAP related files to mach-omap2 the functionality relating to generating secure boot files was modified. This change prevents secure platforms other than AM33xx and OMAP54XX from correctly building files for all needed media types. Fixes: 983e37007da5 ("arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms") Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* serial, ns16550: bugfix: ns16550 fifo not enabledHeiko Schocher2017-01-20-10/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor" breaks u-boot commandline working with long commands sending to the board. Since the above patch, you have to setup the fcr register. For board/archs which enable OF_PLATDATA, the new field fcr in struct ns16550_platdata is not filled with a default value ... This leads in not setting up the uarts fifo, which ends in problems, when you send long commands to u-boots commandline. Detected this issue with automated tbot tests on am335x based shc board. The error does not popup, if you type commands. You need to copy&paste a long command to u-boots commandshell (or send a long command with tbot) Possible boards/plattforms with problems: ./arch/arm/cpu/arm926ejs/lpc32xx/devices.c ./arch/arm/mach-tegra/board.c ./board/overo/overo.c ./board/quipos/cairo/cairo.c ./board/logicpd/omap3som/omap3logic.c ./board/logicpd/zoom1/zoom1.c ./board/timll/devkit8000/devkit8000.c ./board/lg/sniper/sniper.c ./board/ti/beagle/beagle.c ./drivers/serial/serial_rockchip.c Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-01-19-120/+1318
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| * kconfig: fsl PPA: move CONFIG_* to KconfigHou Zhiqiang2017-01-18-2/+26
| | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * ARMv8/sec_firmware: relocated and renamed the config FSL_PPA_ARMV8_PSCIHou Zhiqiang2017-01-18-17/+17
| | | | | | | | | | | | | | | | Moved the config FSL_PPA_ARMV8_PSCI from fsl-layerscape's Kconfig to Kconfig under armv8 and renamed it to SEC_FIRMWARE_ARMV8_PSCI. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * kconfig: armv8: move armv8 sec_firmware CONFIG_* to KconfigHou Zhiqiang2017-01-18-3/+36
| | | | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York S: clean up scripts/config_whitelist.txt] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: aarch64: Fix the warning about x1-x3 nonzero issueAlison Wang2017-01-18-44/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | For 64-bit kernel, there is a warning about x1-x3 nonzero in violation of boot protocol. To fix this issue, input argument 4 is added for armv8_switch_to_el2 and armv8_switch_to_el1. The input argument 4 will be set to the right value, such as zero. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Alexander Graf <agraf@suse.de> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/fsl-layerscape: fdt: fixup LS1043A rev1 MSI nodeWenbin Song2017-01-18-0/+157
| | | | | | | | | | | | | | | | | | | | The default MSI node in kernel tree is for LS1043A rev1.0 silicon, if rev1.1 silicon used, need to fixup the MSI node to match it. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043a: fixup GIC offset for ls1043a rev1Wenbin Song2017-01-18-6/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LS1043A rev1.1 silicon supports two types of GIC offset: 4K alignment and 64K alignment. The bit SCFG_GIC400_ALIGN[GIC_ADDR_BIT] is used to choose which offset will be used. The LS1043A rev1.0 silicon only supports the CIG offset with 4K alignment. If GIC_ADDR_BIT bit is set, 4K alignment is used, or else 64K alignment is used. 64K alignment is the default setting. Overriding the weak smp_kick_all_cpus, the new impletment is able to detect GIC offset. The default GIC offset in kernel device tree is using 4K alignment, it need to be fixed if 64K alignment is detected. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-lsch3: enable snoopable sata read and writeTang Yuantian2017-01-18-0/+2
| | | | | | | | | | | | | | | | | | By default the SATA IP on the ls208Xa SoCs does not generating coherent/snoopable transactions. This patch enable it in the sata axicc register. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * ls1046ardb: Add support power initializationHou Zhiqiang2017-01-18-0/+1
| | | | | | | | | | | | | | | | | | Add the chip power supply voltage initialization on LS1046ARDB. Add function power_init_board(), and it will initialize the PMIC and call the chip power initialization function. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/fsl_lsch2: Add chip power supply voltage setupHou Zhiqiang2017-01-18-0/+372
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set up chip power supply voltage according to voltage ID. The fuse status register provides the values from on-chip voltage ID fuses programmed at the factory. These values define the voltage requirements for the chip. Main operations: 1. Set up the core voltage 2. Set up the SERDES voltage and reset SERDES lanes 3. Enable/disable DDR controller support 0.9V if needed Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Fix SECURE_BOOT configYork Sun2017-01-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | Without a prompt in Kconfig, SECURE_BOOT cannot be selected by defconfig. The option was dropped unintentionally when defconfig files were cleaned up. Three targets were impacted ls1043ardb_SECURE_BOOT, ls2080ardb_SECURE_BOOT, ls2080aqds_SECURE_BOOT. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-15 16:39:44 +0000