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* ARM: arm1176: Define arch_cpu_init() at the SoC levelStephen Warren2012-09-25-8/+25
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2012-09-25-926/+1359
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| * Revert "powerpc: Fix declaration type for I/O functions"Andy Fleming2012-08-23-10/+10
| * powerpc/85xx: clear out TLB on bootScott Wood2012-08-23-33/+48
| * powerpc/mpc8xxx: Move HWCONFIG_BUFFER_SIZE into config.hYork Sun2012-08-23-5/+4
| * powerpc/mpc8xxx DDR: Fix interactive DDR debuggingYork Sun2012-08-23-2/+2
| * powerpc/mpc8xxx DDR: Fall back to raw timing for first controller onlyYork Sun2012-08-23-1/+1
| * powerpc/mpc8xxx DDR: Fix CAS latency calculationYork Sun2012-08-23-2/+4
| * powerpc/mpc8xxx: Fix bug for extended DDR timingYork Sun2012-08-23-20/+43
| * powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleavingYork Sun2012-08-23-318/+455
| * powerpc/mpc8xxx: Add support for cas latency 12 and aboveYork Sun2012-08-23-7/+21
| * powerpc/mpc8xxx: Add fine timing support for DDR3York Sun2012-08-23-12/+36
| * powerpc/mpc85xx: Skip zero values for DDR debug registersYork Sun2012-08-23-3/+11
| * powerpc/mpc8xxx: fix core id for multicore bootingYork Sun2012-08-23-6/+53
| * Added new ext fields to IFCKumar Gala2012-08-23-6/+24
| * Add IFC offset for DPAA/Corenet platformsKumar Gala2012-08-23-0/+1
| * Add e6500 processor detectionKumar Gala2012-08-23-0/+4
| * powerpc/mpc8xxx: use topology registers to calculate number of coresYork Sun2012-08-23-9/+70
| * powerpc/mpc8xxx: Add immap for topology and rcpm registersYork Sun2012-08-23-1/+87
| * powerpc/mpc85xx: Add IFC LAW target ID for FSL High-End SoCPrabhakar Kushwaha2012-08-23-0/+1
| * powerpc/mpc85xx:Enable debugger support to missed e500v2 SoCPrabhakar Kushwaha2012-08-23-0/+4
| * powerpc/fsl-corenet: work around erratum A004510Scott Wood2012-08-23-0/+330
| * powerpc/fsl-corenet: remove dead variant symbolsScott Wood2012-08-23-69/+4
| * powerpc/85xx: remove support for the Freescale P3060Timur Tabi2012-08-23-261/+2
| * powerpc/85xx: add support for FM2 DTSEC5Timur Tabi2012-08-23-0/+8
| * p1014rdb: set ddr bus width properly depending on SVRMatthew McClintock2012-08-23-0/+1
| * powerpc/mpc8xxx: Remove P1015 and P1016 from CPU listYork Sun2012-08-23-39/+2
| * powerpc/corenet_ds: Master module for boot from PCIELiu Gang2012-08-23-22/+22
| * powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macroLiu Gang2012-08-23-0/+1
| * powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build targetLiu Gang2012-08-23-99/+63
| * powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditionalYork Sun2012-08-23-3/+56
| * powerpc: Stack Pointer not properly alignedJoakim Tjernlund2012-08-22-3/+2
| * mpc85xx: Initial SP alignment is wrong.Joakim Tjernlund2012-08-22-11/+5
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-21-269/+448
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| * \ Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-09-21-190/+218
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| | * | MX6: drop binary constants from iomux headerStefano Babic2012-09-17-62/+62
| | * | MX: set a common place to share code for Freescale i.MXStefano Babic2012-09-10-1/+3
| | * | mx31: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-10/+24
| | * | Fix mx31_decode_pllBenoît Thébaudeau2012-09-06-3/+5
| | * | mx35 timer: Switch to 32-kHz sourceBenoît Thébaudeau2012-09-06-17/+27
| | * | mx35: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-28/+31
| | * | mx25: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-9/+23
| | * | mx35: Fix clock dividersBenoît Thébaudeau2012-09-06-59/+31
| | * | mx35: Add definitions for clock gate valuesBenoît Thébaudeau2012-09-06-0/+6
| | * | mx35: Fix decode_pllBenoît Thébaudeau2012-09-06-3/+6
| | * | MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDSMarek Vasut2012-09-04-3/+5
| * | | Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-43/+171
| * | | tegra20: usb: rework set_host_modeLucas Stach2012-09-10-16/+21
| * | | tegra: nand: Add Tegra NAND driverJim Lin2012-09-07-0/+1
| * | | tegra: fdt: Add NAND controller binding and definitionsSimon Glass2012-09-07-0/+7
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