summaryrefslogtreecommitdiff
path: root/arch
Commit message (Expand)AuthorAgeLines
* armv8/ls2085a: call ft_pcie_setup() to change dts statusPrabhakar Kushwaha2015-07-20-0/+4
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-07-15-616/+1639
|\
| * dm: x86: baytrail: Correct PCI region 3 when driver model is usedSimon Glass2015-07-14-0/+2
| * dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-14-47/+10
| * x86: pci: Tidy up the generic x86 PCI driverSimon Glass2015-07-14-22/+0
| * x86: Configure VESA parameters before loading Linux kernelBin Meng2015-07-14-0/+3
| * x86: Remove MARK_GRAPHICS_MEM_WRCOMBBin Meng2015-07-14-8/+0
| * x86: Move VGA option rom macros to KconfigBin Meng2015-07-14-0/+22
| * x86: cmd_mtrr: Improve MTRR list informationBin Meng2015-07-14-1/+2
| * x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng2015-07-14-0/+4
| * x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-14-11/+38
| * x86: bios: Allow pci config read/write to host bridge in int1a_handlerJian Luo2015-07-14-9/+1
| * x86: bios: Synchronize stack between real and protected modeJian Luo2015-07-14-0/+23
| * x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-10/+23
| * x86: Generate a valid MultiProcessor (MP) tableBin Meng2015-07-14-0/+181
| * x86: Add MultiProcessor (MP) table APIsBin Meng2015-07-14-0/+688
| * x86: Remove inline for lapic access routinesBin Meng2015-07-14-151/+153
| * x86: Add I/O APIC register access routinesBin Meng2015-07-14-1/+46
| * x86: Clean up ioapic header fileBin Meng2015-07-14-23/+3
| * x86: Reduce PIRQ routing table sizeBin Meng2015-07-14-9/+56
| * x86: Ignore function number when writing PIRQ routing tableBin Meng2015-07-14-4/+3
| * x86: Write correct bus number for the irq routerBin Meng2015-07-14-1/+1
| * x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-14-12/+12
| * x86: crownbay: Enable DM RTC supportBin Meng2015-07-14-0/+7
| * x86: crownbay: Add MP initializationBin Meng2015-07-14-0/+20
| * x86: Clean up lapic codesBin Meng2015-07-14-183/+103
| * x86: Move lapic_setup() call into init_bsp()Bin Meng2015-07-14-3/+1
| * x86: Move MP initialization codes into a common placeBin Meng2015-07-14-73/+112
| * x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONSBin Meng2015-07-14-1/+0
| * x86: kconfig: Fix minor nits in MAX_CPUSBin Meng2015-07-14-12/+12
| * x86: kconfig: Make MAX_CPUS and AP_STACK_SIZE depend on SMPBin Meng2015-07-14-0/+2
| * x86: dm: Clean up cpu driversBin Meng2015-07-14-55/+86
| * x86: fsp: Move FspInitEntry call to board_init_f()Bin Meng2015-07-14-22/+21
| * x86: fsp: Load GDT before calling FspInitEntryBin Meng2015-07-14-2/+33
| * x86: Add Kconfig options to be used by arch/x86/cpu/config.mkBin Meng2015-07-14-3/+18
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-07-14-1/+68
|\ \ | |/ |/|
| * spi: cadence_qspi: add device tree binding docVikas Manocha2015-07-03-5/+0
| * spi: cadence_qspi: get sram size from device treeVikas Manocha2015-07-03-0/+2
| * stv0991: configure device tree for cadence qspi & flashVikas Manocha2015-07-03-0/+34
| * stv0991: enable cadence qspi controller & spi flashVikas Manocha2015-07-03-0/+3
| * stv0991: configure clock & pad muxing for qspiVikas Manocha2015-07-03-1/+34
* | Merge git://git.denx.de/u-boot-marvellTom Rini2015-07-10-0/+81
|\ \
| * | usb: Add EHCI support for Armada 38x (mvebu)Stefan Roese2015-07-10-0/+1
| * | arm: mvebu: Add SATA/SCSI (AHCI) support for Armada A38xStefan Roese2015-07-10-0/+56
| * | arm: mvebu: Add SDIO/SDHCI support for Armada A38xStefan Roese2015-07-10-0/+24
* | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2015-07-08-10/+10
|\ \ \ | |/ / |/| |
| * | MIPS: change 'extern inline' to 'static inline'Daniel Schwierzeck2015-07-02-9/+9
| * | MIPS: fix missing semicolon in cacheops.hTony Wu2015-07-02-1/+1
| |/
* | sunxi: Adjust Ippo_q8h_v1_2_a33_1024x600 dts filename to match the upstream k...Hans de Goede2015-07-08-1/+1
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-07-07-26/+34
|\ \
generated by cgit v1.1 at 2024-11-29 13:56:19 +0000