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* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-03-10-398/+6
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| * usb: create common header virtual root hub descriptorsStephen Warren2014-03-10-398/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many USB host controller drivers contain almost identical copies of the same virtual root hub descriptors. Put these into a common file to avoid duplication. Note that there were some very minor differences between the descriptors in the various files, such as: - USB 1.0 vs. USB 1.1 - Manufacturer/Device ID - Max packet size - String content I assume these aren't relevant. Cc: Thomas Lange <thomas@corelatus.se> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Eric Millbrandt <emillbrandt@coldhaus.com> Cc: Pierre Aubert <p.aubert@staubli.com> Cc: Stefan Roese <sr@denx.de> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Denis Peter <d.peter@mpl.ch> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Zhang Wei <wei.zhang@freescale.com> Cc: Mateusz Zalega <m.zalega@samsung.com> Cc: Remy Bohmer <linux@bohmer.net> Cc: Markus Klotzbuecher <mk@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: C Nauman <cnauman@diagraph.com> Cc: David Müller <d.mueller@elsoft.ch> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Thomas Abraham <t-abraham@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Andrew Murray <amurray@embedded-bits.co.uk> Cc: Matej Frančeškin <matej.franceskin@comtrade.com> Cc: Cliff Cai <cliff.cai@analog.com> Cc: Bryan Wu <cooloney@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | ahci-plat: Provide a weak scsi_init hookIan Campbell2014-03-10-0/+6
|/ | | | | | This allow the platform to register the platform ahci device. Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-03-07-2/+216
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| * powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040Priyanka Jain2014-03-07-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 SoC has SCFG (Supplement Configuration) Block which provides chip specific configuration and status support. The base address of SCFG block in T1040 is 0xfc000. SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register) at offset 0x28. Add definition of -SCFG block -SCFG_PIXCLKCR register -Bits definition of SCFG_PIXCLK register Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * bootstage: powerpc: support fdt stash and reportingMela Custodio2014-03-07-0/+7
| | | | | | | | | | | | | | | | | | This implements stashing of bootstage timing data to FDT and automatic timing reporting. To enable define CONFIG_BOOTSTAGE_FDT and CONFIG_BOOTSTAGE_REPORT respectively. Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/usb: Workaround for erratum-A006261Suresh Gupta2014-03-07-0/+107
| | | | | | | | | | | | | | | | | | | | | | USB spec says that the minimum disconnect threshold should be over 525 mV. However, internal USB PHY threshold value is below this specified value. Due to this some devices disconnect at run-time. Hence, phy settings are tweaked to increased disconnect threshold to be above 525mV by using this workaround. Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/b4860: Add workaround for errata A006384 and A006475Shaveta Leekha2014-03-07-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384) and at cold temperatures(A006475), workaround recalibrate the PLLs with some SerDes configuration Both these errata are only applicable for b4 rev1. So, make workaround for these errata conditional, depending upon soc version. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks ↵Shaveta Leekha2014-03-07-0/+2
| | | | | | | | | | | | | | | | | | | | re-configuration B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes, add their defines in arch/powerpc/include/asm/config_mpc85xx.h Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * 85xx/b4860: Alternate serdes protocols for B4860/B4420poonam aggrwal2014-03-07-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On B4860 and B4420, some serdes protocols can be used with LC VCO as well as Ring VCO options. Addded Alternate options with LC VCO for such protocols. For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/b4860qds: Add support to make PCIe SATA work on B4860QDSShaveta Leekha2014-03-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | 1) SerDes2 Refclks have been set properly to make PCIe SATA to work as it work on SerDes refclk of 100MHz 2) Mask the SerDes's device reset request before changing the Refclks for SerDes1 and SerDes2 for PLL locks to happen properly, device reset request bit unmasked after SerDes refclks configuration Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/b4860qds: Add support to make Aurora work on B4860QDSShaveta Leekha2014-03-07-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | 1) Add new SerDes1 protocols having Aurora in them 2) Add VSC cross point connections for Aurora to work with CPRI and SGMIIs 3) Configure VSC crossbar switch to connect SerDes1 lanes to aurora on board, by checking SerDes1 protocols 4) SerDes1 Refclks have been set properly to make Aurora, CPRI and SGMIIs to work together properly Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | kbuild: move "checkgcc4" to PowerPC archprepareMasahiro Yamada2014-03-07-1/+10
| | | | | | | | | | | | | | | | | | | | "checkgcc4" is used only for PowerPC. Move it to arch/powerpc/config.mk. To make sure gcc is new enough before beginning build, run "checkgcc4" during "archprepare". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: move "checkthumb" to ARM archprepareMasahiro Yamada2014-03-07-1/+11
| | | | | | | | | | | | | | | | | | | | "checkthumb" makes sense only for ARM architecture. Move it to arch/arm/config.mk. To make sure gcc supports THUMB mode before beginning build, run "checkthumb" during "archprepare". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260Masahiro Yamada2014-03-07-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, CONFIG_MPC8260 and CONFIG_8260 were used mixed-up. All boards with mpc8260 cpu defined both of them: - CONFIG_MPC8260 was defined in board config headers and include/common.h - CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk We do not need to have both of them. This commit keeps only CONFIG_MPC8260. This commit does: - Delete CONFIG_8260 and CONFIG_MPC8260 definition in config headers and include/common.h - Rename CONFIG_8260 to CONFIG_MPC8260 in arch/powerpc/cpu/mpc8260/config.mk. - Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de>
* | mips: move CONFIG_MIPS{32, 64} definition to config.mkMasahiro Yamada2014-03-07-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All mips32 boards define CONFIG_MIPS32 in config headers except malta boards which define it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | kbuild: improve Kbuild speedMasahiro Yamada2014-03-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kbuild brought about many advantages for us but a significant performance regression was reported by Simon Glass. After some discussions and analysis, it turned out its main cause is in $(call cc-option,...). Historically, U-Boot parses all config.mk (arch/*/config.mk and board/*/config.mk) every time descending into subdirectories. That means cc-options are evaluated over and over again. $(call cc-option,...) is useful but costly. So we want to evaluate them only in ./Makefile and spl/Makefile and export compiler flags. This commit changes the build system as follows: - Modify scripts/Makefile.build to not include config.mk Instead, add $(PLATFORM_CPPFLAGS) to asflags-y, ccflags-y, cppflags-y. - Export many variables Going forward, Kbuild will not parse config.mk files when it descends into subdirectories. If we want to set variables in config.mk and use them in subdirectories, they must be exported. This is the list of variables to get exported: PLATFORM_CPPFLAGS CPUDIR BOARDDIR OBJCOPYFLAGS LDFLAGS LDFLAGS_FINAL (used in nand_spl/board/*/*/Makefile) CONFIG_STANDALONE_LOAD_ADDR (used in examples/standalone/Makefile) SYM_PREFIX (used in examples/standalone/Makefile) RELFLAGS (used in examples/standalone/Makefile) - Delete CPPFLAGS This variable has been replaced with PLATFORM_CPPFLAGS - Copy gcclibdir from example/standalone/Makefile to arch/sparc/config.mk The reference in CONFIG_STANDALONE_LOAD_ADDR must be resolved before it is exported. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reported-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> [on Sandbox] Tested-by: Stephen Warren <swarren@nvidia.com> [on Tegra]
* | config.mk: specify the exact path to standalone linker scriptMasahiro Yamada2014-03-07-5/+9
| | | | | | | | | | | | | | | | | | | | | | We want to change the build system to include config.mk only from ./Makefile and spl/Makefile. We must prepare for that in this commit. $(src) is a moving target and not handy for our purpose. We must replace it with a fixed path. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCCMasahiro Yamada2014-03-07-90/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding "CONFIG_" prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes" in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | ppc4xx: Remove 4xx NAND booting supportStefan Roese2014-03-07-142/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As ppc4xx currently only supports the deprecated nand_spl infrastructure and nobody seems to have time / resources to port this over to the newer SPL infrastructure, lets remove NAND booting completely. This should not affect the "normal", non NAND-booting ppc4xx platforms that are currently supported. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tirumala Marri <tmarri@apm.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | unit-test: make "test -e" test independent of $CWDStephen Warren2014-03-07-0/+5
|/ | | | | | | | | | | | | | The unit-test for hush's "test -e" currently relies upon being run in the U-Boot build directory, because it tests for the existence of a file that exists in that directory. Fix this by explicitly creating the file we use for the existence test, and deleting it afterwards so that multiple successive unit-test invocations succeed. This required adding an os.c function to erase files. Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2014-03-04-442/+15
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| * mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-77/+0
| | | | | | | | | | | | | | | | | | omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-88/+4
| | | | | | | | | | | | | | | | | | omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers ↵pekon gupta2014-03-04-194/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into common omap_gpmc.h Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related defines and declarations scattered in SoC platform specific header files like include/asm/arch-xx/cpu.h However, GPMC hardware remains same across all platforms thus this patch merges GPMC data scattered across different arch-xx specific header files into single header file include/asm/arch/omap_gpmc.h Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: remove unused #defines from common omap_gpmc.hpekon gupta2014-03-04-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI params or nand_id[] table. And based on that it defines ECC layout. This patch 1) removes following board configs used for defining NAND ECC layout - GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND) - GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND) - GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND) - GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND) 2) removes unused #defines in common omap_gpmc.h depending on above configs Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: remove redundant platform specific header: arch-xx/omap_gpmc.hpekon gupta2014-03-04-86/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are two sets of omap_gpmc.h header files (a) arch/arm/include/asm/omap_gpmc.h common header file for all platforms, containing defines and declarations used by GPMC NAND driver. (b) arch/arm/include/asm/arch-xx/omap_gpmc.h SoC platform specific header file containing defines like ECC layout. This patch removes platform specific arch-xx/omap_gpmc.c because: - GPMC hardware engine is common for all SoC platforms hence only (a) is enough - ECC layout is now defined in omap_nand.c driver itself based on ecc-scheme selected. Hence all ECC layout declarations in (b) are redundant. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: optimize chip->ecc.hwctl() for H/W ECC schemespekon gupta2014-03-03-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip->ecc.hwctl() is used for preparing the H/W controller before read/write NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.) Though all ECC schemes in OMAP NAND driver use GPMC controller for generating ECC syndrome (for both Read/Write accesses). But but in current code HAM1_ECC and BCHx_ECC schemes implement individual function to achieve this. This patch (1) removes omap_hwecc_init() and omap_hwecc_init_bch() as chip->ecc.hwctl will re-initializeGPMC before every read/write call. omap_hwecc_init_bch() -> omap_enable_ecc_bch() (2) merges the GPMC configuration code for all ECC schemes into single omap_enable_hwecc(), thus adding scalability for future ECC schemes. omap_enable_hwecc() + omap_enable_ecc_bch() -> omap_enable_hwecc() Signed-off-by: Pekon Gupta <pekon@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2014-03-04-20/+3
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| * | MIPS: fix types u64 and __u64 to unsigned long longDaniel Schwierzeck2014-03-04-20/+3
| |/ | | | | | | | | | | | | | | Linux MIPS uses asm-generic/int-ll64.h in asm/types.h. Thus u64 and __u64 are defined as unsigned long long. Port this over to U-Boot. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | kbuild: fix CROSS_COMPILE settings in config.mkMasahiro Yamada2014-03-04-14/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The syntax CROSS_COMIPLE ?= <cross_compiler_prefix> does not work because config.mk is parsed after exporting CROSS_COMPILE. Like Linux Kernel's arch/$(ARCH)/Makefile, we must write as follows: ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := <cross_compiler_prefix> endif Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: consolidate PLATFORM_LIBSMasahiro Yamada2014-03-04-7/+2
| | | | | | | | | | | | | | | | | | | | We had switched to Kbuild so now we can specify PLATFORM_LIBS/PLATFORM_LIBGCC with relative path. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | sandbox: Convert GPIOs to use driver modelSimon Glass2014-03-04-9/+5
| | | | | | | | | | | | Convert sandbox over to use driver model GPIOs. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: Build a device tree file for sandboxSimon Glass2014-03-04-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | Add support for building a device tree for sandbox's CONFIG_OF_HOSTFILE option to make it easier to use device tree with sandbox. This adjusts the Makefile to build a u-boot.dtb file which can be passed to sandbox U-Boot with: ./u-boot -d u-boot.dtb Signed-off-by: Simon Glass <sjg@chromium.org>
* | sizes.h - consolidate for all architecturesAlexey Brodkin2014-03-04-47/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Stefan Roese <sr@denx.de> [trini: Add bcm Kona platforms to the patch] Signed-off-by: Tom Rini <trini@ti.com>
* | m68k: merge compile flags -ffixed-d7 -sep-dataMasahiro Yamada2014-03-04-10/+2
| | | | | | | | | | | | | | | | | | All arch/m68k/cpu/*/config.mk define the same flags PLAGFORM_REFLFLAGS += -ffixed-d7 -msep-data Move it to arch/m68k/config.mk Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Jason Jin <Jason.jin@freescale.com>
* | sh: merge compiler flag -ffixed-r13Masahiro Yamada2014-03-04-3/+1
| | | | | | | | | | | | | | | | -ffixed-r13 is defined commonly for sh2, sh3, sh4. Move it to arch/sh/config.mk Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | sh: Do not define -ffreestanding twiceMasahiro Yamada2014-03-04-1/+1
| | | | | | | | | | | | | | | | -ffreestanding is defined at the top Makefile for all architectures. Do not define it twice for SH2A. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | x86: Delete redundant compiler flagsMasahiro Yamada2014-03-04-4/+1
| | | | | | | | | | | | | | | | | | | | | | -Wstrict-prototypes, -ffreestanding, -fno-stack-protector are defined at the top Makefile for all architectures. Do not define them twice for x86. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | mmc: zynq: Add OF initialization supportMichal Simek2014-03-04-0/+1
|/ | | | | | Enable initialize sdhci from DTB. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-344/+1967
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * arm: Switch to -mno-unaligned-access when supported by the compilerTom Rini2014-02-26-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unaligned accesses being allowed and fast at the hardware level. We set this bit and must pass along -mno-unaligned-access so that the compiler will still breakdown accesses and not trigger a data abort. To better help understand the requirements of the project with respect to unaligned memory access, the Documentation/unaligned-memory-access.txt file has been added as doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1 tag of the kernel. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
| * arm: remove unneeded symbol offsets and _TEXT_BASEAlbert ARIBAUD2014-02-26-310/+7
| | | | | | | | | | | | | | | | Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * arm: make _end compiler-generatedAlbert ARIBAUD2014-02-26-16/+65
| | | | | | | | | | | | | | | | | | This prevents references to _end from generating absolute relocation records. This change is binary invariant for ARM targets. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-24-11/+54
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| | * ti814x: Fix illegal use of FP ops in clock_ti814x.cMåns Rullgård2014-02-21-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The function pll_sigma_delta_val uses "float" data which is not correct. The exact "why" of this mangling is lost to history, but this changes us to equivalent non-FP math to get the same results. Reported-by: Wolfgang Denk <wd@denx.de> Acked-by: Matt Porter <mporter@linaro.org>
| | * DRA7: fix ABB efuse offset for OPP_NOMNishanth Menon2014-02-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 194dd74ad919e57026f385aaab7f89acf7ea79ef (DRA7: add ABB setup for MPU voltage domain) Made an offset typo error by using 0x4A003B24 as the efuse offset for OPP_NOM. As per TI documentation, 0x4A003B24 is for OPP_OD, and 0x4A003B20 is for OPP_NOM. Fix the same. Reported-by: Praveen Rao <prao@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
| | * ARM: OMAP4: fix DDR timings for OMAP4430 ES2.0Janne Grunau2014-02-21-0/+18
| | | | | | | | | | | | | | | | | | | | | DDR timings were broken since 47abc3df701d8bc26f311350aa523fc1d0f8ad4e for PandaBoard EA1. Signed-off-by: Janne Grunau <j@jannau.net>
| | * ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator controlDave Gerlach2014-02-21-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Schematic indicates GPIO5_7 is to be used for VTT regulator control rather than GPIO0_21 so modify enable_vtt_regulator to reflect this. Without this some boards will experience DDR3 corruption and fail to boot. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [trini: Rework patch against mainline] Signed-off-by: Tom Rini <trini@ti.com>
| | * Add support for B&R KWB MotherboardHannes Petermaier2014-02-21-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: trini@ti.com
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