summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
...
| * | Revert "exynos: Enable PSHOLD in SPL"Minkyu Kang2014-06-13-2/+0
| | | | | | | | | | | | This reverts commit eb0dd9986c3883820ff888c3738b013c0a7d918c.
* | | Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-01-1/+1
|\ \ \
| * | | tegra20: display: fix checking of return valueJeroen Hofstee2014-06-19-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The calling code seems a bit in doubt about the return value of fdtdec_lookup_phandle. Since it returns a negative value on error (and fdt_node_offset_by_phandle as well), check for that. cc: Wei Ni <wni@nvidia.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-01-283/+94
|\ \ \
| * | | OMAP: disable gpmc timeout safely for reenablingStefano Babic2014-06-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpmc timeout is disabled and the reset counter is set to 0. However, if later a driver activates the timeout setting the reset to a valid value, the old reset value with zero is still valid for the first access. In fact, the timeout block loads the reset counter after a successful access. Found on a am335x board with a FPGA connected to the GPMC bus together with the NAND. When the FPGA driver in kernel activates the timeout, the system hangs at the first access by the NAND driver. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | omap3: board: trivial: add void for no argsJeroen Hofstee2014-06-19-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | | cpu: armv7: am33x: ddr: write emif ref_ctrl_shadow registerFelipe Balbi2014-06-19-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Felipe Balbi <balbi@ti.com>
| * | | ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.cKhoronzhuk, Ivan2014-06-19-105/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | mtd: nand: davinci: add header file for driver definitionsKhoronzhuk, Ivan2014-06-19-175/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions inside emif_defs.h concern davinci nand driver and should be in it's header. So create header file for davinci nand driver and move definitions from emif_defs.h and nand_defs.h to it. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> [trini: Fixup more davinci breakage] Signed-off-by: Tom Rini <trini@ti.com>
| * | | omap: Don't enable GPMC CS0 with nothing attachedAsh Charles2014-06-19-1/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_(NAND|NOR|ONENAND) is not defined, no configuration is set for GPMC on chip select #0---size is 0. In this case, the GPMC configuration should be reset but not enabled. Enabling causes the Gumstix DuoVero board to hang when entering Linux. Signed-off-by: Ash Charles <ashcharles@gmail.com> [trini: Switch to testing base as GPMC_SIZE_256M is 0x0] Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-30-162/+962
|\ \ \ | | |/ | |/|
| * | vf610: fix build due to missing sys_proto.hStefano Babic2014-06-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | commit 67a04ab3ab8522a3a34491853e46105317580df5 fix the build for MX25. The same error happens for VF610 SOC. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | imx: correct HAB status for new chip TOStefano Babic2014-06-17-14/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0 ENGR00287268 mx6: fix the secure boot issue on the new tapout chip commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b newer i.MX6 silicon revisions have an updated ROM and HAB API table. Please see also: i.MX Applications Processors Documentation Engineering Bulletins EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison With this change the secure boot status is correctly displayed Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | mx6: Fix definition of IOMUXC_GPR12_DEVICE_TYPE_RCFabio Estevam2014-06-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6 reference manual incorrectly states that the DEVICE_TYPE field of IOMUXC_GPR12 register should be configured as '0010' for setting the PCI controller in RC mode. The correct value should be '0100' instead. This also aligns with the same value used in the mx6 pci kernel driver. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | MX25: fix build due to missing sys_proto.hStefano Babic2014-06-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | THe mx25 arch does not have a sys_proto.h file. Instead of creating a dummy file, the file is not included for this SOC. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | imx: sata: return failure if not IMX6Q/IMX6DTim Harvey2014-06-06-1/+6
| | | | | | | | | | | | | | | | | | | | | The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return instead of configuring the SATA clock and GPR13 registers. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: iomux: add macros to setup iomux for multiple SoC typesTim Harvey2014-06-06-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list and add macros for declaring the pad_list that take into account the SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL iomux). Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | mx6: add mmdc configuration for MX6Q/MX6DLTim Harvey2014-06-06-0/+563
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add function for configuring iomux based on board-specific regs - add function for configuring mmdc based on board-specific and chip-specific data Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | mx6: add structs for mmdc and ddr iomux registersTim Harvey2014-06-06-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add memory-mapped structures for MMDC iomux and configuration. Note that whi the MMDC configuration registers are common between the IMX6DQ (IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux registers differ. This requires two sets of structures. Add structures to describe DDR3 device information, system information (memory layout, etc), and MMDC calibration registers that can be used to configure the MMDC dynamically. We define these structures for SPL builds instead of including mx6q-ddr.h an mx6dl-ddr.h which use the same namespace and are only useful for imximage cf files. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | imx: add comments and remove unused struct fieldsTim Harvey2014-06-06-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add comment block for the imx_ddr_size function and remove the extra unused fields from struct esd_mmdc_regs which are also not common between IMX53 and IMX6. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | mx6: add boot device support for SPLTim Harvey2014-06-06-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a common spl.c file to support boot device functions needed for SPL such as detecting the boot device. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | spl: consolidate arch/arm/include/asm/arch-*/spl.hMasahiro Yamada2014-06-06-135/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/include/asm/spl.h requires all SoCs to have arch/arm/include/asm/arch-*/spl.h. But many of them just define BOOT_DEVICE_* macros. Those macros are used in the "switch (boot_device) { ... }" statement in common/spl/spl.c. So they should not be archtecture specific, but be described as a simpile enumeration. This commit merges most of arch/arm/include/asm/arch-*/spl.h into arch/arm/include/asm/spl.h. With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h will be merged, while I am not sure about OMAP and Exynos. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> CC: Stefano Babic <sbabic@denx.de> CC: Minkyu Kang <mk7.kang@samsung.com> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bo Shen <voice.shen@atmel.com> [on sama5d3xek board for at91 part] Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stefano Babic <sbabic@denx.de> [applying Tim's i.MX6 patches] Acked-by: Tom Rini <trini@ti.com>
* | | Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD2014-06-25-0/+1
|\ \ \
| * | | arm: zynq: fix a bug in Zynq linker scriptMasahiro Yamada2014-06-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 41623c91 moved exception handlers to ".vectores" section but it missed to adjust Zynq linker script. Zynq boards hang up after relocation because "_start" symbol does not point to the correct address and gd->relocaddr gets insane. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Tested-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-25-202/+1777
|\ \ \ \
| * | | | sandbox: change local_irq_save() to macroMasahiro Yamada2014-06-23-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | local_irq_save() should be a macro, not a function because local_irq_save() saves flag to the given argument. GCC is silent about this issue, but Clang warns: In file included from lib/asm-offsets.c:15: In file included from include/common.h:20: In file included from include/linux/bitops.h:110: arch/sandbox/include/asm/bitops.h:59:17: warning: variable 'flags' is uninitialized when used here [-Wuninitialized] local_irq_save(flags); ^~~~~ That change causes another warning: In file included from include/linux/bitops.h:110:0, from include/common.h:20, from lib/asm-offsets.c:15: arch/sandbox/include/asm/bitops.h: In function ‘test_and_set_bit’: arch/sandbox/include/asm/bitops.h:56:16: warning: unused variable ‘flags’ [-Wunused-variable] So, flags should be set to __always_unused. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | | | sandbox: terminate os_dirent_ls() result listStephen Warren2014-06-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each node in the linked-list that os_dirent_ls() returns has its next pointer set only when the next node is created. For the last node in the list, there is no next node, so this never happens, and the next pointer is never initialized. Explicitly initialize the next pointer so that it isn't dangling. Without this, "sb ls" might crash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Enable 32-bit build using x86_64 multilib toolchainVasili Galka2014-06-23-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now building the x86 arch boards required 32-bit toolchain. As many x86_64 toolchains come with 32-bit support (multilib) that's a good idea to enable build with such toolchains. The change required was to specify the usage of 32-bit explicitly to the compiler and the linker (-m32 and -m elf_i386 flags) and locate the right libgcc path. Signed-off-by: Vasili Galka <vvv444@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | tegra: dts: Bring in GPIO bindings from linuxSimon Glass2014-06-20-28/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These files are taken from Linux 3.14. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
| * | | | Makefile: Support include files for .dts filesSimon Glass2014-06-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux supports this, and if we are to have compatible device tree files, U-Boot should also. Avoid giving the device tree files access to U-Boot's include/ directory. Only include/dt-bindings is accessible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | sandbox: Support iotrace featureSimon Glass2014-06-20-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the iotrace feature for sandbox, and enable it, using some dummy I/O access methods. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | arm: Support iotrace featureSimon Glass2014-06-20-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the iotrace feature for ARM, when enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | m68k: Remove CONFIG_CMD_BEDBUG related codeVasili Galka2014-06-19-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This flag does not compile on m68k since 2003 (8bde7f7) when a required "cmd_bedbug.h" header was removed. Eleven years passed, lets clean up a little... Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * | | | .gitignore: drop include/asm/proc from ignore patternMasahiro Yamada2014-06-19-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7d89982b stopped creating symbolic link arch/${arch}/include/asm/proc. arch/.gitignore should be updated. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Vasili Galka <vvv444@gmail.com>
| * | | | fdt_support: delete force argument of fdt_initrd()Masahiro Yamada2014-06-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After all, we have realized "force" argument is completely useless. fdt_initrd() was always called with force = 1. We should always want to do the same thing (set appropriate value to the property) even if the property already exists. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | m68k:correct io macros about endianChao Fu2014-06-19-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | M68k is big endian cpu ,so use be_out and be_in in big endian. Signed-off-by: Chao Fu <b44548@freescale.com>
| * | | | m68k: eliminate a warning in cpu_initMasahiro Yamada2014-06-19-1/+1
| |/ / / | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | Remove ${objtree}/include/asm/proc/ linkVasili Galka2014-06-11-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mkconfig links ${objtree}/include/asm/proc/ to ${srctree}/arch/${arch}/include/asm/proc-armv/. This seems to be a remnant from the past. Ever since its introduction in 2003 it is used only in ARM build and always links to same place, so let's simplify the code, remove it and reference directly where needed. Successful MAKEALL for ARM and PowerPC verified on Linux. Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * | | cosmetic: Whitespace fixVasili Galka2014-06-11-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * | | m68k: Fix warnings with gcc 4.6Simon Glass2014-06-11-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the warnings seem to be related to using 'int' for size_t. Change this and fix up the remaining warnings and problems. For bootm, the warning was masked by others, and there is an actual bug in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | Check run_command() return code properlyThomas Betker2014-06-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | run_command() returns 0 for success, 1 for failure. Fix places which assume that failure is indicated by a negative return code. Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
| * | | am33xx/omap: Enable CONFIG_OF_CONTROLSimon Glass2014-06-11-0/+1097
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for device tree control and add device tree files for the beaglebone black initially. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | am33xx/omap: Allow cache enable for all Sitara/OMAPSimon Glass2014-06-11-58/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined. This speeds up the Beaglebone Black boot considerable. (Tested only on Beaglebone Black with SD card boot) Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-06-08-80/+250
| |\ \ \
| * \ \ \ Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-06-05-6/+469
| |\ \ \ \
| | * | | | powerpc/mpc85xx: Add workaround to enable TDM on T1040Sandeep Singh2014-06-05-1/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a workaround for 32 bit hardware limitation of TDM. T1040 has 36 bit physical addressing, TDM DMAC register are 32 bit wide but need to store address of CCSR space which lies beyond 32 bit address range. This workaround creats a LAW to enable access of TDM DMA to CCSR by mapping CCSR to overlap with DDR. A hole of 16M is created in memory using device tree. This workaround law is set only if "tdm" is defined in hwconfig. Also disable POST tests and add LIODN for TDM Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | | | powerpc/serdes: Add the workaround for erratum A-007186Shaveta Leekha2014-06-05-2/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SerDes PLL is calibrated at reset. When the junction temperature delta from the time the PLL is calibrated exceeds +56C/-66C, jitter may increase and can cause PLL to unlock. This workaround overwrite the SerDes registers with new values, to calibrate SerDes registers. These values are known to work fine for all temperature ranges. This workaround is valid for B4, T4 and T2 platforms, so added in their config. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> [York Sun: replaced typedef ccsr_sfp_regs_t with struct ccsr_sfp_regs] Reviewed-by: York Sun <yorksun@freescale.com>
| | * | | | powerpc/mpc85xx: Add workaround for DDR erratum A004508York Sun2014-06-05-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the DDR controller is initialized below a junction temperature of 0°C and then operated above a junction temperature of 65°C, the DDR controller may cause receive data errors, resulting ECC errors and/or corrupted data. This erratum applies to the following SoCs and their variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023, P2020. Signed-off-by: York Sun <yorksun@freescale.com>
| | * | | | powerpc/t2080: add serdes2 protocol 0x27Shengzhou Liu2014-06-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new serdes2 protocol 0x27. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | | | powerpc/t4qds: Add alternate serdes protocols to align with A-007186Shaohui Xie2014-06-05-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. Only the protocols using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-08-21 16:26:54 +0000