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* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2012-02-13-53/+9
|\ | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-blackfin: Blackfin: pata_bfin: fix printf warning Blackfin: bfin_nand: mark local func static linkage.h: move from blackfin to common includes Blackfin: br4: new board port Blackfin: add in/out le32 variants post: add blackfin to the post_time_ms list Blackfin: bf537-stamp: drop board reset workaround Blackfin: pr1: new board port
| * linkage.h: move from blackfin to common includesMacpaul Lin2012-02-12-53/+7
| | | | | | | | | | | | | | | | | | | | | | 1. Add linkage.h support from blackfin to common include, which is a reduced version from Linux. 2. Add architecture part support of linkage.h into blackfin 3. Fix include path of in blackfin related to linkage.h due to header file movement. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add in/out le32 variantsMike Frysinger2012-02-12-0/+2
| | | | | | | | | | | | | | These are rarely used, but the post code does currently, so add small redirect hacks for that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Changes to move hawkboard to the new spl infrastructureSughosh Ganu2012-02-12-11/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves hawkboard to the new spl infrastructure from the older nand_spl one. Removed the hawkboard_nand_config build option -- The spl code now gets compiled with hawkboard_config, after building the main u-boot image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard to reflect the same. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
* | arm, arm926ejs: Enable icache only if CONFIG_SYS_ICACHE_OFF is not definedChristian Riesch2012-02-12-1/+4
| | | | | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
* | arm, arm926ejs: Add option CONFIG_SYS_EXCEPTION_VECTORS_HIGHChristian Riesch2012-02-12-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH that allows setting the correct value for the V bit. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Heiko Schocher <hs@denx.de>
* | arm, arm926ejs: Flush the data cache before disabling itSughosh Ganu2012-02-12-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation invalidates the data cache before turning it off and causes problems on the hawkboard. See the discussion in http://lists.denx.de/pipermail/u-boot/2012-January/115212.html According to the ARM926EJ-S Technical Reference Manual, the cache should be flushed instead. Also fix the comments to match code. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Rebased and corrected commit message. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
* | arm, arm926ejs: Do cpu critical inits only for boards that require itChristian Riesch2012-02-12-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reverts commit ca4b55800ed74207c35271bf7335a092d4955416 "arm, arm926ejs: always do cpu critical inits" since it impacts all arm926ejs based configurations and caused problems, e.g., with the hawkboard. Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines from the board configurations that need low level initialization. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
* | arm, davinci: Add lowlevel_init for SoCs other than DM644XChristian Riesch2012-02-12-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The low level initialization code in arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S was written for DM644X SoCs only. This patch makes the lowlevel_init function in this file a dummy function for SoCs other than DM644X. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Sergey Kubushyn <ksi@koi8.net> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
* | ARMV7: Fix duplicate use of "b" parameter in ACTIM_CTRLA definitionPeter Barada2012-02-12-28/+29
| | | | | | | | | | | | | | | | ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS() instead of "c". To make usage more clear, replace all single-letter macro parameters with more descriptive parameter names. Signed-off-by: Peter Barada <peter.barada@logicpd.com>
* | OMAP4460: Reduce MPU clock speed from 920 to 700Aneesh V2012-02-12-11/+11
| | | | | | | | | | | | | | | | | | | | We do not have thermal management or Smartreflex enabled at U-Boot level. So, it's better to stick to OPP100 for MPU instead of the OPP Turbo that is used now. Adjust the VDD_MPU accordingly. Tested-by: Sebastien Jan <s-jan@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* | davinci: add support for printing clock frequencyHadli, Manjunath2012-02-12-1/+44
| | | | | | | | | | | | | | | | | | add support for printing various clock frequency info found in SOC such as ARM core frequency, DSP core frequency and DDR frequency as part of bdinfo command. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com>
* | davinci: remove macro CONFIG_DISPLAY_CPUINFOHadli, Manjunath2012-02-12-44/+0
| | | | | | | | | | | | | | | | | | | | remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer required. This is because clock info will be printed as part 'bdinfo' command and also remove support print_cpuinfo() as it will no longer be called. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com>
* | omap3: fix comment typosPeter Meerwald2012-02-12-2/+2
| | | | | | | | Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
* | AM3517: Changed default clock rate for AM3517Schuyler Patton2012-02-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | AM3517: Changed default clock rate for AM3517 Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows the AM3517 to boot up at 600MHz instead of 500 MHz Signed-off-by: Schuyler Patton <spatton@ti.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@gmail.com> CC: Stefano Babic <sbabic@denx.de>
* | OMAP4: clock-common: Move the usb dppl configuration to new funcGovindraj.R2012-02-12-21/+33
| | | | | | | | | | | | | | | | | | | | | | usb dpll configuration is done only part of non-essential dppl configuration however if CONFIG_USB_EHCI_OMAP is defined we may have to configure usb dpll's for proper functioning of usb modules. So move the usb dppl configuration to a new func. and utilise the same during essential dpll configuration. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
* | OMAP3+: Clock: Adding ehci clock enablingGovindraj.R2012-02-12-0/+30
| | | | | | | | | | | | | | | | | | | | Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from clock framework. Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
* | ehci-omap: Clean up added ehci-omap.cGovindraj.R2012-02-12-24/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up added ehci-omap.c and make it generic for re-use across omap-soc having same ehci ip block. Also pass the modes to be configured from board file and configure the ports accordingly. All usb layers are not cache aligned, till then keep cache off for usb ops as ehci will use internally dma for all usb ops. * Add a generic common header ehci-omap.h having common ip block data and reg shifts. * Rename and modify ehci-omap3 to ehci.h retain only conflicting sysc reg shifts remove others and move to common header file. * pass the board data for beagle/panda accordinly to use ehci ports. Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
* | ARM: EXYNOS: Add support for Exynos5 based SoCsChander Kashyap2012-02-12-12/+854
| | | | | | | | | | | | | | | | Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of SoCs. This patch adds the support for Exynos5. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macroChander Kashyap2012-02-12-5/+1
| | | | | | | | | | | | | | | | | | CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it generic for exynos architecture. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | S5P: support generic watchdog timerMinkyu Kang2012-02-12-1/+124
| | | | | | | | | | | | | | | | This patch adds support the generic watchdog timer for s5pc1xx and exynos4 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: HeungJun, Kim <riverful.kim@samsung.com>
* | ARMV7: Exynos4: Add supoort power for Exynos4HeungJun, Kim2012-02-12-0/+231
| | | | | | | | | | | | | | | | This patch adds power.h and SAMSUNG_BASE() macro for using Exynos4 power. Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | ARMV7: Exynos4: Add watchdog.h for Exynos4HeungJun, Kim2012-02-12-0/+53
| | | | | | | | | | | | | | | | This patch add watchdog.h for Exynos4 Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Exynos: Fix ARM Clock frequency calculationChander Kashyap2012-02-12-6/+9
| | | | | | | | | | | | | | | | | | | | Earliar ARM clock frequency was calculated by: MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL. It is fixed by calculating it as follows: ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1) Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Exynos: PWM: Add TCMPB3 field in pwm structureChander Kashyap2012-02-12-1/+1
| | | | | | | | | | | | | | Add TCMPB3 field in pwm structure, earliar this was res1. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | bugfix: all Marvell specific build fails due to undefined reference to ↵Prafulla Wadaskar2012-02-12-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | `get_ticks' after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell build fails with below error common/libcommon.o: In function `cread_line': /home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_ticks' /home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_tbclk' /home/uboot/src/u-boot-arm/common/main.c:720: undefined reference to `get_ticks' The same is fixed for Kirkwood, ARMADA100, pantheon and orion5x SoCs Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm, arm-kirkwood: disable l2c before linux bootMichael Walle2012-02-12-0/+46
| | | | | | | | | | | | | | | | | | | | | | The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de>
* | orion5x: add USB host ehci-marvell supportAlbert ARIBAUD2012-02-12-0/+12
| | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Remove kirkwood-specifics from marvell EHCI driverAlbert ARIBAUD2012-02-12-0/+12
| | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Rename ehci-kirkwood as ehci-marvellAlbert ARIBAUD2012-02-12-1/+1
| | | | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* | i.mx: i.mx5: update imx_get_mac_from_fuse functionJason Liu2012-02-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FEC does not work on the i.mx51/53evk board, it will hangup In: serial Out: serial Err: serial Net: After bisect, it due to the following commit: be252b6 net: imx: Add multi-FEC support for imx_get_mac_from_fuse has change the imx_get_mac_from_fuse fucntion prototype, but fail to update i.mx5, here it does it. After apply this patch, u-boot works again on i.mx51/53 evk boards. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | mx28: Show CPU frequencyFabio Estevam2012-02-12-1/+2
| | | | | | | | | | | | | | | | Showing CPU frequency during boot is useful information. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | mmc: access mxcmmc from mx31 boardsHelmut Raiger2012-02-12-24/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* | i.mx6: mx6x_pins: Fix uart txd definitionsTroy Kisky2012-02-12-24/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | The uart txd pad can also provide the rxd function. But it does not stop its tx role. This could be used for a half duplex serial port. Change names to reduce confusion. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* | arm, davinci: add timer defines for tcr fieldHeiko Schocher2012-02-12-0/+13
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com>
* | arm, davinci: add workaround for not resetting DMA bus and VPSS modulesHeiko Schocher2012-02-12-4/+61
| | | | | | | | | | | | | | | | | | | | The Buffer Logic of VPSS is Not Reset by System Reset Pin, see http://www.ti.com/lit/er/sprz316b/sprz316b.pdf chapter Advisory 1.2.1 on page 9. Add workaroundcode proposed in the errata. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com>
* | OMAP SPL: Fix missing timer_init() call in OMAP4 s_init()Dechesne, Nicolas2012-02-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | In 8775471bb, the call to timer_init() was removed from common code and put in OMAP3 s_init() function. As a result the boot was broken on OMAP4. This patch adds timer_init() in OMAP4 s_init(), that fix boot on all OMAP4 boards. Signed-off-by: Nicolas Dechesne <n-dechesne@ti.com> Tested-by: Robert P. J. Day <rpjday@crashcourse.ca> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com>
* | OMAP3: Correct get_sdr_cs_offset maskTom Rini2012-02-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The function get_sdr_cs_offset reads the CS_CFG register in the SDRC to determine where CS1 is mapped to. make_cs1_contiguous() will set CS1 to follow after CS0. The CS_CFG register has values in bits 9:8 and 3:0 but we had erroneously been testing 5:4 and 3:0 resulting in incorrect offsets on platforms with less than 128MB as 3:0 describe 128MB hunks and 9:8 describe 32MB offsets after the 128MB hunk. Tested-by: Grant Erickson <marathon96@gmail.com> Signed-off-by: Tom Rini <trini@ti.com>
* | arm: omap3: Define save_boot_params in lowlevel_init.S for SPL onlyPali Rohár2012-02-12-2/+2
| | | | | | | | | | | | | | | | Wrap the function save_boot_params with CONFIG_SPL_BUILD. This will allow non-SPL boards to define their own save_boot_params functions in U-Boot itself. Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
* | arm, davinci: add PLL0 prediv to da850 lowlevel setupBen Gardiner2012-02-12-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP-L138 has a pre-divider available on PLL0. Add support to da850_lowlevel.c for configuring PLL0's pre-divider. This is to achieve certain OPP's -- e.g. the 372MHz OPP used also by Linux. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Cc: Christian Riesch <christian.riesch@omicron.at> CC: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Christian Riesch <christian.riesch@omicron.at>
* | tegra2: Enable data cacheSimon Glass2012-02-12-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | This enables the data cache on Tegra2 boards. As discussed on the list, this is better off in the Tegra2 cpu code than in a particular vendor directory. We should be safe turning on the cache for all Tegra2 boards. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Add SDMMC support to funcmuxSimon Glass2012-02-12-0/+71
| | | | | | | | | | | | | | | | | | This adds support for SDMMC ports to the funcmux. Only one option is supported: FUNCMUXO_SDMMC_8BIT which selects an 8-bit wide SDIO interface where available. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Add I2C support to funcmuxSimon Glass2012-02-12-0/+47
| | | | | | | | | | | | | | | | Add support to funcmux for selecting I2C functions and programming the pinmux appropriately. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Add enum to select from available funcmux configsSimon Glass2012-02-12-6/+17
| | | | | | | | | | | | | | | | | | We want to give a name to each available funcmux config. For now we just use the pin group names (even through it is verbose) since there seems to be nothing better. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Adjust funcmux config test to permit expansionSimon Glass2012-02-12-25/+38
| | | | | | | | | | | | | | | | We want to support config options other than zero, so move the test to the end to allow intermediate code to OK such a config. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra2: Fix default RAM size selection in odmdataStephen Warren2012-02-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A value of 0 in the odmdata RAM size field means default, which is 512MB not 1GB. Fix this. For reference, see: http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;\ f=arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h;\ h=1ec7010911454f19a5018952fd245785a62c59ad;\ hb=0e52d7fe25b11a656c376a37890be219470661fb v2: New patch Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra2: Fix conflicting pinmux for UARTAStephen Warren2012-02-12-0/+12
|/ | | | | | | | | | | | | | | Tegra appears to boot with function UARTA pre-selected on mux group SDB. If two mux groups are both set to the same function, it's unclear which group's pins drive the RX signals into the HW module. For UARTA, SDB certainly overrides group IRTX in practice. To solve this, configure some alternative function on SDB to avoid the conflict. Also, tri-state the group to avoid driving any signal onto it until we know what's connected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: AM33XX: Add i2c supportPatil, Rachna2012-01-23-1/+89
| | | | | | | Add i2c driver board hookup for AM335X EVM Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
* overo: add SPL supportAndreas Müller2012-01-16-0/+26
| | | | | | | | | | * implementation based on ti beagleboard/omap3evm * timing data and i2c workaround for revision 0 boards taken from x-loader * run-tested with overo revision 0 and 1 / boot from NAND and SDcard * run-tested with x-loader Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* omap_rev_string: output to stdoutAndreas Müller2012-01-16-17/+11
| | | | | | | | * avoid potential buffer overflows * allow SPL-build not to output "Texas Instruments Revision detection unimplemented" Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
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