| Commit message (Collapse) | Author | Age | Lines |
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Implement driver check for card detection.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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The various mmc_host_def.h files are almost identical.
Reduce code duplication by moving the similar definitions to a common
header file.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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Based on
http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
we need to re-work our sequence in config_sdram slightly to match what
the TRM describes as the correct sequence. In our current (incorrect)
sequence some edge cases may fail to initalize correctly.
Signed-off-by: Tom Rini <trini@ti.com>
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This patch adds BOOT_DEVICE define for USB booting and fixes
spl_board_init function to call arch_misc_init (this is the place there
musb is initialized).
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of
kernel version 3.7.5. If the driver is used for the da850, then SoC
variant must be specified by CONFIG_SOC_DA850.
Signed-off-by: Tomas Novotny <tomas@novotny.cz>
Cc: Tom Rini <trini@ti.com>
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This pulls the three following ZYNQ commits into ARM master:
7dca54f8: xilinx: zynq: Enable DCC and create new zynq_dcc board
59c651f4: arm: zynq: Add SLCR support with system reset
00ed3458: arm: zynq: Add lowlevel initialization to C
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Do lowlevel initialization directly in C. Zynq do not
require to do it in asm.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The patch provides slcr base address initialization support
and a support to reset the cpu through slcr driver,
hence removed the reset_cpu() from board.c.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove the manual relocation of env_name_spec. This has been missed
in the previous patch series for introducing dynamic relocation
on MIPS.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This code is pretty old and we want to support only 32-bit systems now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
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Invert the polarity of this option to simplify the Makefile logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gabe Black <gabeblack@chromium.org>
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This x86 CPU variant is no longer required as the boards that use it have
been removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
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The code handles relocation entries with the
following relocation types only:
mips32: R_MIPS_REL32
mips64: R_MIPS_REL+R_MIPS_64
xburst: R_MIPS_REL32
Other relocation entries are skipped without
processing. The code must be extended if other
relocation types must be supported.
Add -pie to LDFLAGS_FINAL to generate the .rel.dyn
fixup table, which will be applied to the relocated
image before transferring control to it.
The CONFIG_NEEDS_MANUAL_RELOC is not needed
after the patch, so remove that as well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This section contain the table needed for dynamic
relocation. Also provide symbols for the relocation
code to access the table.
Discard all sections which are not needed in the final
ELF binary and U-Boot image. Section .dynsym cannot be
discarded or GNU ld crashes otherwise. This section
will be stripped by GNU objcpy in a later patch.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Use the newly introduced symbol __image_copy_end as end address for
relocation of U-Boot image. This is needed for dynamic relocation added
in later patches. This patch obsoletes the symbols uboot_end and
uboot_end_data which are removed.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Get the start and end address for clearing BSS from the newly
introduced symbols __bss_start and __bss_end. After GOT is
relocated, those symbols are already pointing to the correct
addresses.
Also optimize the loop by moving the address incrementation
to the delay slot to avoid the initial sub instruction.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Use the newly introduced symbols __image_copy_end and __bss_end
for setting up the memory area for the relocated U-Boot.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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This symbol is used in later patches as end address
for relocation of the U-Boot image into RAM.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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These symbols are used in later patches for as addresses for
clearing the BSS area in the relocated U-Boot image.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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The '__got_start' and '__got_end' symbols are used
only in the linker script to compute the value of
the 'num_got_entries' symbol.
Remove the symbols and use the SIZEOF(.got) command
to get the size of the .got section.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Adopt reset vector handling from Yamon.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Fix access to global_data which is broken since commits:
commit 035cbe99cd2fd4adf9d7fd95aeebb5f814e37eb9
Author: Simon Glass <sjg@chromium.org>
Date: Thu Dec 13 20:49:08 2012 +0000
mips: Move per_clk and dev_clk to arch_global_data
Move these field into arch_global_data and tidy up. The other
CONFIG_JZSOC fields are used by various architectures, so just remove
the #ifdef bracketing for these.
Signed-off-by: Simon Glass <sjg@chromium.org>
commit 582601da2f90b1850aa19f7820b1623c79b3dac6
Author: Simon Glass <sjg@chromium.org>
Date: Thu Dec 13 20:48:35 2012 +0000
arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
commit 66ee69234795c0596f84b25f06b7fbc2e8ed214c
Author: Simon Glass <sjg@chromium.org>
Date: Thu Dec 13 20:48:34 2012 +0000
arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
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No one expects to end up in a delayed environment if
CONFIG_DELAY_ENVIRONMENT isn't defined.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
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These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).
Signed-off-by: Tom Warren <twarren@nvidia.com>
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These files are used by both SPL and main U-Boot.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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These files are for code that runs on the CPU (A15) on T114 boards.
At this time, there is no A15-specific code here.
As T114-specific run-time code is added, it'll go here.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This provides SPL support for T114 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Common Tegra files are in arch-tegra, shared between T20/T30/T114.
Tegra114-specific headers are in arch-tegra114. Note that some of
these will be filled in as more T114 support is added (drivers,
WB/LP0 support, etc.).
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Add driver for tegra SPI "SLINK" style driver. This controller is
similar to the tegra20 SPI "SFLASH" controller. The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices. In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH. Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.
This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.
To enable this driver, use CONFIG_TEGRA_SLINK
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add I/O addresses of SPI SLINK controllers 1-6
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add tegra30 SPI SLINK nodes to fdt.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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SBC1 is SPI controller 1 on tegra30
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add node for tegra20 SPI SFLASH controller to fdt.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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FUNCMUX_ defines should be named after the pin groups they affect, not
after the module they're muxing onto those pin groups.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This 'commonizes' much of the clock/pll code. SoC-dependent code
and tables are left in arch/cpu/tegraXXX-common/clock.c
Some T30 tables needed whitespace fixes due to checkpatch complaints.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
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AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the
DDR3 chip.
[Hebbar Gururaja <gururaja.hebbar@ti.com>]
- Resolve merge conflict while rebasing. File structure is
changed in the mainline. So re-arrange the code accordingly.
- Update commit message to reflect the DDR3 part number
Signed-off-by: Jeff Lance <j-lance1@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
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The board is named pcm051 and has this hardware:
SOC: TI AM3359
DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB
ETH 1: LAN8710AI
SPI-Flash: W25Q64BVSSIG
RTC: RV-4162-C7
I2C-EEPROM: CAT32WC32
NAND: MT29F4G08_VFPGA63
PMIC: TPS65910A3
LCD
Supported:
UART 1
MMC/SD
ETH 1
USB
I2C
SPI
Not yet supported:
NAND
RTC
LCD
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
[trini: Add #define CONFIG_PHY_ADDR 0 to config]
Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
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Since wfi instruction is only available on ARMv7, add a conditional
macro for it.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Some MXS based boards do not implement the card-detect signal. Allow
user to specify alternate card-detect implementation.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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The MX23 SSP register layout differs from MX28 in certain bits,
adjust the register layout accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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The MX23 has less channels for the APBH DMA, sligtly different register
layout and some bits in those registers are placed differently. Reflect
this in the driver. This patch fixes MMC/DMA issue on MX23.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
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Using the __weak annotation can make the code cleaner.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
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