summaryrefslogtreecommitdiff
path: root/arch
Commit message (Expand)AuthorAgeLines
* am33xx: Add support, update omap3 McSPI driverTom Rini2012-09-01-0/+5
* am33xx: Correct MMC1, remove MMC2 supportTom Rini2012-09-01-4/+9
* i.MX28: bug fixes in PMU configuration codeStathis Voukelatos2012-09-01-6/+6
* MX28: Move the u-boot.bd info CPUDIR/SOCDIRMarek Vasut2012-09-01-0/+14
* mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCsOtavio Salvador2012-09-01-1/+1
* mxs: Clarify why we poweroff in case of brownout in 5v conflictOtavio Salvador2012-09-01-0/+4
* mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador2012-09-01-112/+112
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-01-124/+124
* mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador2012-09-01-517/+517
* mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador2012-09-01-1/+1
* MX28: use a clear name for DDR2 initializationOtavio Salvador2012-09-01-6/+6
* MX28: extend print_cpuinfo() to use chip informationOtavio Salvador2012-09-01-2/+40
* imx: Use a clear identification of an unidentified CPU typeOtavio Salvador2012-09-01-2/+2
* Enable the EMAC clock in at91_macb_hw_init().Markus Hubig2012-09-01-0/+4
* arm : Atmel : add at91sam9x5ek board supportBo Shen2012-09-01-2/+508
* DaVinci DA8xx: fix set_cpu_clk_info()Laurence Withers2012-09-01-9/+14
* DaVinci DA8xx: replace magic number for DDR speedLaurence Withers2012-09-01-1/+4
* DaVinci DA850: UART2 clock ID comes from ASYNC3Laurence Withers2012-09-01-1/+3
* DaVinci DA8xx: tidy up clock ID definitionLaurence Withers2012-09-01-16/+40
* dm: Move OMAP GPIO driver to drivers/gpio/Marek Vasut2012-09-01-246/+0
* am33xx: Rework pinmux functionsTom Rini2012-09-01-53/+33
* am33xx evm: Add CONFIG_CMD_EEPROM and relatedTom Rini2012-09-01-9/+4
* am33xx: Add support for TI AM335x StarterKit EVMTom Rini2012-09-01-2/+40
* am33xx: Remove board/ti/am335x/evm.cTom Rini2012-09-01-0/+173
* am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and supportTom Rini2012-09-01-0/+60
* am33xx: Rework config_ddr to make DDR3 support easier.Tom Rini2012-09-01-14/+23
* am33xx: Move some variables in emif4.c, mark them static.Tom Rini2012-09-01-4/+3
* am33xx: Correct and clean up ddr_regs structTom Rini2012-09-01-34/+20
* am33xx: Do not touch 'ratio1' fieldsTom Rini2012-09-01-35/+7
* am33xx: Rework config_io_ctrl slightlyTom Rini2012-09-01-27/+8
* am33xx: Use emif_regs struct for storing initialization valuesTom Rini2012-09-01-78/+31
* am33xx: Turn a number of 'int' functions to 'void'Tom Rini2012-09-01-42/+15
* am33xx: Document what we're doing with ddrctrl->ddrckectrlTom Rini2012-09-01-4/+3
* am335x: ddr_defs: Update EMIF parametersVaibhav Bedia2012-09-01-5/+5
* am33xx: Clean up unused DDR defines, prefix more with 'DDR2'Tom Rini2012-09-01-43/+35
* am33xx: Move the call to ddr_pll_config, make it take the frequencyTom Rini2012-09-01-3/+5
* am33xx: Pass to config_ddr the type of memory that is connectedTom Rini2012-09-01-20/+31
* am33xx: Make config_cmd_ctrl / config_ddr_data take const structsTom Rini2012-09-01-61/+48
* am33xx: Rework DDR2 EMIF initalization slightlyTom Rini2012-09-01-15/+2
* am33xx: Bugfix to config_sdram()Tom Rini2012-09-01-2/+1
* am33xx: Remove extra check in enable_ddr_clocksTom Rini2012-09-01-5/+0
* am33xx: Convert to using <asm/emif.h> to describe the EMIFTom Rini2012-09-01-41/+15
* am33xx: Remove DMM_BASE defineTom Rini2012-09-01-1/+0
* am33xx: Enable gpio0 clockTom Rini2012-09-01-0/+4
* OMAP3: mem: Add Numonyx OneNAND 200MHz timing informationJavier Martinez Canillas2012-09-01-0/+29
* am33xx: pin mux defintions for CPSW switchChandan Nath2012-09-01-0/+2
* am33xx: CPSW init and definitionsChandan Nath2012-09-01-1/+23
* arm/davinci/da850: add uart0 pinmuxMikhail Kshevetskiy2012-09-01-0/+7
* arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138Mikhail Kshevetskiy2012-09-01-7/+20
* Revert "arm: armv7: add compile option -mno-unaligned-access if available"Albert ARIBAUD2012-09-01-2/+0
generated by cgit v1.1 at 2024-11-06 07:01:21 +0000