| Commit message (Collapse) | Author | Age | Lines |
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Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee)
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authenticate_image() is slower than necessary since caching is not
enabled for OCRAM and Boot ROM. This patch turns them on.
It also sets the pu_irom_mmu_enabled bit in OCRAM so that ROM code
will properly flush caches.
Signed-off-by: Jay Monkman <jay.monkman@freescale.com>
(cherry picked from commit 9d3bd9da11fd7f35d818fe8d8c15c2906175df19)
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Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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imx6 boards (sabresd, sabreauto, arm2 and slevk) have multiple SD/MMC ports to boot.
But current uboot hard code the SD/MMC port for environment variables storage. So
if customer changes a port without modifying the configuration "CONFIG_SYS_MMC_ENV_DEV",
error will issue at saving and loading environment.
Implement a mechanism to detect SD/MMC port from SRC SMBR register, and override the
default "mmc_get_env_devno". The "board_late_mmc_env_init" is used to set "mmcdev"
when booting from SD/MMC port. Finally after booting from SD/MMC, the environment storage
device and "mmcdev" are both set to current SD/MMC port. Customers don't need to re-build
the image if booting from different SD/MMC port.
This patch also adds SD1 and SD3 support to imx6slevk BSP, and adds support for sabreauto
SD1 slot on base board.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 7f789db44b3d5bcdf0aa4952f724701aa90e5fc1)
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Boot ROM fix the "glitchless mux" issue on TO1.2 which will mask
MMDC_CH0_MASK in CCM_CCDR, it will cause different behavior of
reset, need to clear this MMDC_CHx_MASK field to make sure
all the i.MX6 series SOCs have same behavior of reset.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit c168913446d199b1dc3f10ecb3b691cbd8e01690)
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Add BSP codes to support SPI NOR flash read, write and erase by using
"sf" command.
In addition, add a new configuration "mx6slevk_spinor" for building
the uboot that can be booted from SPI NOR flash and stored the
environments variables in it.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 4651abb4900bb01f077c0fdac6363a214abc79bf)
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Enable the USB EHCI for the imx6slevk board. Add VBUS control
pin settings and related BSP codes.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 712f9f6ae901f03115b27ad7a4c000276334591a)
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Add an mxc_ocotp driver for i.MX6.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
(cherry picked from commit 112fd2ec6c1a96c6ff51490c28eb971795a2dd95)
Signed-off-by: Ye.Li <B37916@freescale.com>
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IIM:
- Homogenize prg_p naming (the reference manuals are not always self-consistent
for that).
- Add missing SCSx and bank registers.
- Fix the number of banks on i.MX53.
OCOTP:
- Rename iim to ocotp in order to avoid confusion.
- Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the
reference manual.
- Merge the existing spinoff gp1 fuse definition on i.MX6.
- Fix the number of banks on i.MX6.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Stefano Babic <sbabic@denx.de>
(cherry picked from commit 8f3ff11c1f82e51e3f4c1f7c32b88693046dc318)
Conflicts:
arch/arm/include/asm/arch-mx6/imx-regs.h
Signed-off-by: Ye.Li <B37916@freescale.com>
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The imx6slevk has keyboards on the board, so add mxc_keyb driver to
support the recovery keys pressing checking. The key mapping table
is defined in "mx6slevkandroid.h" with CONFIG_MXC_KPD enabled.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Support android features:
fastboot, booti command and recovery for sabresd SD, sabresd eMMC,
sabreauto SD, sabreauto NAND.
For all booting media (SD, eMMC, NAND), inherits the partitions layout
from v2009.08. Fastboot will detect the booting media to replace
hardcoding fastboot device. SATA is not supported.
FDT is supported to use the "unused" fields in bootimg header which
requires the FDT to be combined into the boot.img.
For non-FDT boot.img, the "unused" fields should left to NULL and is
compatible to boot.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Android fastboot leans on the USB gadget driver to communicate with host. Porting
the imx_udc driver from v2009.08 with two changes: adding resource/memory release
APIs and replacing the uncached memory with cache flush&invalidate operations.
Pins and Clocks initialization are added to support boards:
mx6qdlsabresd, mx6qdlsabreauto, mx6slevk
Signed-off-by: Ye.Li <B37916@freescale.com>
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-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize
the CCGR3 register caused an undefined value for CG0.
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
(cherry picked from commit a0a0dacfe8ff8d7036db823ca5ea9ba393a35187)
Signed-off-by: Jason Liu <r64343@freescale.com>
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A little background is probably appropriate for this patch.
Since "the beginning" of usage of the SABRE Lite and Nitrogen6x
boards, DVI detection has been somewhat broken.
Some (most) DVI monitors don't produce the "HPD" bit in
the PHY_STAT0 register, but do show proper toggling of the
RX_SENSE0..3 bits.
Creating a new the bit-mask to include all five bits and
modifying the 'hdmidet' command and internal detection
routines allows these monitors to function properly in U-Boot.
A related patch to our kernels allows things to work under
Linux:
https://github.com/boundarydevices/linux-imx6/commit/7d8752905c118af9063738a533227de0b2f6ecd4
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
(cherry picked from commit 10f779da54b8a8c85df6d58592c40836d8e7ed49)
Signed-off-by: Jason Liu <r64343@freescale.com>
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Instead of duplicating HDMI setup code for every mx6 board, factor out the common code
Signed-off-by: Pardeep Kumar Singla <b45784@freescale.com>
Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
(cherry picked from commit 5ea7f0e328c19542ce96d8242125b51b3dbca86b)
Conflicts:
arch/arm/cpu/armv7/mx6/soc.c
arch/arm/include/asm/arch-mx6/clock.h
Signed-off-by: Jason Liu <r64343@freescale.com>
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Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
(cherry picked from commit 7aa1e8bb1bdbcc9d6114f70504257c2eae4b0cd7)
Signed-off-by: Jason Liu <r64343@freescale.com>
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Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board.
- Currently, splash screen consists of a simple black border
around a white screen. Done this way to save in memory footprint.
- EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD
and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly
(hang), since some additional content on the boot device (waveform file) is
required for EPDC splash to work correctly.
Please refer to Linux Reference Manual for how to flash WAVEFORM file.
Signed-off-by: Robby Cai <R63905@freescale.com>
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The new TO(i.MX6Q TO1.5 and i.MX6DL TO1.2) of ROM change the HAB API
table address, thus the secure boot can't boot up on the new TO.
This patch fix this issue by fix up the HAB API table address according
to the TO revision.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Fix below two warning:
soc.c: In function 'check_1_2G':
soc.c:488:2: warning: suggest parentheses around comparison in operand of
'&' [-Wparentheses]
main.c: In function 'main_loop':
main.c:444:3: warning: implicit declaration of function 'set_default_env'
[-Wimplicit-function-declaration]
set_default_env("Use default environment for mfgtools\n");
Signed-off-by: Robin Gong <b38343@freescale.com>
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ROM did not invalidate L1 cache when download by usb
Need invalidate L1 cache before enable cache
Signed-off-by: Huang yongcai <b20788@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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i.MX6DQ TO1.5 and i.MX6DL/SOLO change the ROM_API_TABLE_BASE_ADDR
from 0xc0 to 0xc4.Need update the plugin code to sync with this change.
The change as the following for the new TO with i.MX6DQ, i.MX6DL/SOLO:
For i.MX6DQ, if the TO >=1.5, will use the new ROM_API_TABLE_BASE_ADDR=0xc4
For i.MX6DL/S, if the TO >=1.2, will use the new ROM_API_TABLE_BASE_ADDR=0xc4
For the old TO, we will still use the 0xc0 to keep compatible.
Signed-off-by: Jason Liu <r64343@freescale.com>
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If we use 'bootz' to boot kernel, u-boot will not touch the global 'images',
but in both 'bootm' and 'bootz' will use 'working_fdt' as the fdt load address.
So we replace 'images.ft_addr' with 'working_fdt' to support 'bootz' and
'bootm'.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Use hang() instead of do_reset, so that we can easily see what error happen.
Signed-off-by: Robin Gong <b38343@freescale.com>
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--Get fdt_blob from images.ft_addr which set by boot command instead of
'fdt_addr' param, so that we can use any other name as fdt load address.
--If find it's not ldo-enable dts on 1.2G chip, will report the error log and
reset board to correct the dtb file.
Signed-off-by: Robin Gong <b38343@freescale.com>
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If boot from usb, reset environment to default value.
Auto apply mfgtools setting and boot mfgtools kernel.
Signed-off-by: Frank Li <Frank.li@freescale.com>
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Check the right property setting of "fsl,ldo-bypass" in dts to know what ldo
mode we need use(ldo-bypass or ldo-enable). Before only check the presence of
"fsl,ldo-bypass", now change to check whether "fsl,ldo-bypass = <1>" in dts.
If yes, switch to ldo-bypass mode. If "fsl,ldo-bypass = <0>" or no "fsl,
ldo-bypass" property, u-boot keep in ldo-enable mode.
Signed-off-by: Robin Gong <b38343@freescale.com>
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We need add clear warning message to remind useing ldo-enable dts for 1.2G chip
. Correct 1.2G check code too.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Enable ldo bypass check on mx6 and get fdt->blob from 'fdt_addr' which
contained the right fdt.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Add ldo bypass and 1.2G check in soc.c. Extend arch_preboot_os to support
read ldo-bypass from fdt.
Signed-off-by: Robin Gong <b38343@freescale.com>
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This patch add the secureboot support
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch add the core plugin helper function support
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to turn on the L2 cache support
Signed-off-by: Jason Liu <r64343@freescale.com>
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- Add i2c0 support for imx6sl evk platform.
- Read pmic device ID and revsion ID.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Add imx6sl evk fec pad config and fec initial code.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Add fec clock enable interface in clock.c file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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mx6 solo-lite is another member of the mx6 series.
For more information about mx6 solo-lite, please visit:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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shutdown vddpu and pcie phy to save power
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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Per the IC design, we need to gate/ungate all the unused PFDs
to make sure PFD is working correctly, otherwise, PFDs may not
not output clock after reset.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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The patch add the CPU thermal temperature support.
Use universal equation for all i.MX6 series SOCs.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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ROM may modify CORE's LDO step_time settings according to the fuse
setting for safe, reset them to the default value.Reset it to 0'b00.
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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Add the GPMI nand support
Signed-off-by: Jason Liu <r64343@freescale.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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This will be used by the i.MX6 NAND support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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directory
This patch moves the following functions into the imx-common
directory:
- mxs_wait_mask_set()
- mxs_wait_mask_clr()
- mxs_reset_block()
These are currently used by i.MX28. But the upcoming GPMI NAND port
for i.MX6 will also use these functions. So lets move them to a
common location to re-use them.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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The following headers are moved to a i.MX common location:
- regs-common.h
- regs-apbh.h
- regs-bch.h
- regs-gpmi.h
- dma.h
This way this header can be re-used also by other i.MX platforms.
For example the i.MX6 which will need it for the upcoming NAND
support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
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This patch is to add the initial Freescale i.MX6dl sabresd board support.
- The DDR script has been updated to the v1.5 version from ddr-scripts-rel
commit: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts.
- i.mx6dl sabre-sd board shared the same design with i.mx6q sabre-sd board
except the SOC is different.Thus, we can use the same board file.
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to factor out the common iomux pad ctrl definition.
No function change at all.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Quick manual fixup to merge the USB boot related defines and TPM related
defines.
Conflicts:
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
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