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* arm: rmobile: koelsch: Fix QoS revision 0.240 and 0.320Nobuhiro Iwamatsu2014-05-21-0/+1
| | | | | | | | Add register define of DBSC3 operation adjustment register, and add initial value. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: r8a7791: Fix MOD_SEL3 function table about FN_SEL_IEBNobuhiro Iwamatsu2014-05-21-1/+1
| | | | | | | | FN_SEL_IEB is assigned 2bit, and 2bit can represent 4 patterns. However FN_SEL_IEB but we only use 3. It adds empty patterns as 0. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* gpio: r8a7790-gpio: Fix typo in macroNobuhiro Iwamatsu2014-05-21-3/+3
| | | | | | Fix typo from __ASM_R8A7790_H__ to __ASM_R8A7790_GPIO_H__. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* gpio: r8a7791-gpio: Fix typo in macroNobuhiro Iwamatsu2014-05-21-3/+3
| | | | | | Fix typo from __ASM_R8A7791_H__ to __ASM_R8A7791_GPIO_H__. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* arm: rmobile: Add define of SCIF register for R8A7790 and R8A7791Nobuhiro Iwamatsu2014-05-21-0/+8
| | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2014-05-20-93/+136
|\ | | | | | | | | | | | | | | | | Conflicts: boards.cfg Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatting (commit 1b37fa83).
| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-05-16-0/+8
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| | * mpc85xx/p1020:Define number of USB controllers used on P1020RDB-PD platformramneek mehresh2014-05-16-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | P1020 SoC which has two USB controllers, but only first one is used on this platform. Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * powerpc/mpc85xx: Added B4460 supportShaveta Leekha2014-05-16-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4460 differs from B4860 only in number of CPU cores, hence used existing support for B4860. B4460 has 2 PPC cores whereas B4860 has 4 PPC cores. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * fsl/pci: Add workaround for erratum A-005434Chunhe Lan2014-05-16-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are mapped to 0xF, which is local memory. But for BSC9132, 0xF is CCSR, 0x0 is local memory. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | Revert "sandbox: move source files from board/ to arch/sandbox/"Masahiro Yamada2014-05-16-84/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 258060905e04fe2eb509756ef3b37e23e220a2d6. Conflicts: boards.cfg Wrong patch 25806090 was applied by accident. Revert it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * powerpc/mpc86xx: Fix boot_flag for calling board_init_f()York Sun2014-05-13-0/+1
| | | | | | | | | | | | | | The argument boot_flag of board_inti_f() hasn't been used for powerpc until recent changing to use generic board. Set it to 0 as a proper value. Signed-off-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Fix boot_flag for calling board_init_f()York Sun2014-05-13-5/+8
| | | | | | | | | | | | | | | | | | baord_init_f takes one argument, boot_flag. It has not been used for powerpc, until recently changing to use generic board architecture. The boot flag is added as a return value from cpu_init_f(). Signed-off-by: York Sun <yorksun@freescale.com> CC: Alexander Graf <agraf@suse.de>
| * powerpc/mpc85xx: Ignore FDT pointer for non-QEMU in cpu_init_early_f()York Sun2014-05-13-0/+2
| | | | | | | | | | | | | | | | | | The pointer of device tree comes from r3 for QEMU. This is not the case for normal SoCs out of reset. Having gd->fdt_blob as 0 is important for other functions to detect the non-existence of device tree. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alexander Graf <agraf@suse.de>
| * powerpc/mpc85xx: Update TLB CAMs in relocated modeAlexander Graf2014-05-13-0/+1
| | | | | | | | | | | | | | | | We want to use the TLB mapping helpers in relocated mode as well. These helpers need to have awareness of already occupied TLB entries. We already had them in sync in non-relocated mode, but need to resync them when we move into relocated. Signed-off-by: Alexander Graf <agraf@suse.de>
| * PPC 85xx QEMU: Don't use HID1Alexander Graf2014-05-13-1/+1
| | | | | | | | | | | | | | | | | | | | For the QEMU machine type, we can plug in either e500v2, e500mc, e5500 or e6500 style cores into the system. U-boot has to work with all of them. So avoid using HID1 which is not available on e500mc systems to make sure we don't trap on it. Signed-off-by: Alexander Graf <agraf@suse.de>
| * PPC 85xx QEMU: Always assume 1 coreAlexander Graf2014-05-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only need u-boot to bother about a single core in the QEMU machine. Everything that would require additional knowledge of more cores gets handled by QEMU and passed straight into the payload we execute. Because of this setup, it would be counterproductive to enable SMP support in u-boot. We would have to rip CPUs out of already existing spin tables and respin them from u-boot. It would be a pretty big mess. So only assume we have a single core. This fixes errors about CONFIG_MP being disabled. Signed-off-by: Alexander Graf <agraf@suse.de>
| * powerpc/85xx: add T4080 SoC supportShengzhou Liu2014-05-13-10/+56
| | | | | | | | | | | | | | | | The T4080 SoC is a low-power version of the T4160. T4080 combines 4 dual-threaded Power Architecture e6500 cores with single cluster and two memory complexes. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * powerpc/t208x: enable errata A006261, A006593, A006379Shengzhou Liu2014-05-13-0/+6
| | | | | | | | | | | | | | Enable errata A006261, A006593, A006379 for T208x. Additionally enable CONFIG_CMD_ERRATA for T2080RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * powerpc/mpc85xx: SECURE BOOT- Add secure boot target for T2080RDBAneesh Bansal2014-05-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | Secure Boot Target is added for T2080RDB Changes: For Secure boot, CPC is configured as SRAM and used as house keeping area which needs to be disabled. So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T2080RDB. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
| * powerpc/mpc85xx: SECURE BOOT- secure boot target for t1040rdbAneesh Bansal2014-05-13-1/+1
| | | | | | | | | | | | | | | | T1040RDB.h file is removed and a unified file T104xRDB.h is created. Hence macro CONFIG_T1040 is renamed to CONFIG_T104x. Signed-off-by: Gaurav Kumar Rana <gaurav.rana@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
| * powerpc/85xx: Add T4240RDB board supportChunhe Lan2014-05-13-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
| * common/board_f: Initialized global data for generic boardYork Sun2014-05-12-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms (tested on mpc85xx, mpc86xx) use global data before calling function baord_inti_f(). The data should not be cleared later. Any arch which uses global data in generic board board_init_f() should define CONFIG_SYS_GENERIC_GLOBAL_DATA. Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com> CC: Simon Glass <sjg@chromium.org> CC: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
| * cosmetic: delete misleading comment /* CONFIG_BOARDDIR */Masahiro Yamada2014-05-12-4/+4
| | | | | | | | | | | | | | CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * blackfin: replace bfin_gen_rand_mac() with eth_random_addr()Masahiro Yamada2014-05-12-28/+0
| | | | | | | | | | | | | | | | | | | | | | bfin_gen_rand_mac() uses __DATE__ as the seed for random ethernet address. This makes the build non-deterministic. In the first place, it should not be implemented as a Bfin-specific function. Use eth_random_addr() instead. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.zhang@analog.com>
| * bd_info: remove bi_barudrate member from struct bd_infoMasahiro Yamada2014-05-12-26/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gd->bd->bi_baudrate is a copy of gd->baudrate. Since baudrate is a common feature for all architectures, keep gd->baudrate only. It is true that bi_baudrate was passed to the kernel in that structure but it was a long time ago. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
| * Merge branch 'tom' of git://git.denx.de/u-boot-x86Tom Rini2014-05-09-1/+91
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| | * sandbox: ignore sandbox.dtbMasahiro Yamada2014-05-09-0/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| | * sandbox: move source files from board/ to arch/sandbox/Masahiro Yamada2014-05-09-1/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to commit 33a02da0, all boards must have board/${BOARD}/ or board/${VENDOR}/${BOARD}/ directory. Now this rule is obsolete. It looks weird that sandbox defines "vendor" and "board" just for meeting the old U-Boot directory structure. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org>
| | * sandbox: Provide a build option to avoid using SDLSimon Glass2014-05-09-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some machines do not have SDL libraries installed, and it is still useful to build sandbox without LCD/keyboard support. Add an option for this, used as follows: make sandbox_config all NO_SDL=1 Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-05-09-5429/+6132
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| * | leon: implement missing get_tbclk()Daniel Hellstrom2014-05-08-0/+10
| | | | | | | | | | | | | | | | | | | | | Without this patch SPARC/LEON does not build. Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | leon: use CONFIG_SYS_HZ to config timer prescalerDaniel Hellstrom2014-05-08-16/+18
| | | | | | | | | | | | | | | | | | Before it was hardcoded to 1000 ticks per second. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* | | Merge remote-tracking branch 'u-boot-sh/rmobile'Albert ARIBAUD2014-05-16-1286/+706
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Trivial conflict, maintainer change plus board addition
| * | | arm: rmobile: Add register infomation of PLL regsiterNobuhiro Iwamatsu2014-04-28-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: r8a7791: Add support ES2 revisionNobuhiro Iwamatsu2014-04-28-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is ES2 is a new revision to R8A7791. This adds support this revision. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: r8a7790: Add support ES2 revisionNobuhiro Iwamatsu2014-04-28-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is ES2 is a new revision to R8A7790. This adds support this revision. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Update print_cpuinfo functionNobuhiro Iwamatsu2014-04-28-27/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The print_cpuinfo fucntion has same code. It has a code of many common. This adds a table of CPU information, duplicate using for-loop. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Add prototype for function to get the CPU information to rmobile.hNobuhiro Iwamatsu2014-04-28-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are defined but has no prototype declaration. Add them. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Add rmobile_get_cpu_rev_fraction() for R-Car SoCsNobuhiro Iwamatsu2014-04-28-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds rmobile_get_cpu_rev_fraction to get fraction revision for R-Car SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Add 1 to value of the CPU revision in ↵Nobuhiro Iwamatsu2014-04-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rmobile_get_cpu_rev_integer() Value that can be obtained in the rmobile_get_cpu_rev_integer() starts at 0. However, revisions to start from 1, which adds 1. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Merge functions to get the CPU information of R8A7790 and R8A7791Nobuhiro Iwamatsu2014-04-28-34/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Functions to get the CPU information of R8A7790 and R8A7791 are common. This merges these as cpu_info-rcar.c. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: r8a779x: Fix L2 cache init and latency settingNobuhiro Iwamatsu2014-04-28-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | L2CTLR only need to update for cluster 0. This changes L2CTLR to initialize only when cluster is 0. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | arm: rmobile: Coordinate the common part of the header file of r8a7790 and ↵Nobuhiro Iwamatsu2014-04-28-1224/+640
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r8a7791 Header files of R8A7790 and R8A7791 have common part of many. This coordinates as rcar-base.h. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-05-16-5/+287
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| * \ \ \ Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-05-15-4508/+765
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| * | | | imx25: Add new hardware registersThomas Diener2014-05-09-0/+175
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Diener <dietho@gmx.de>
| * | | | iomux-v3: Add support for mx6sl LVE bitFabio Estevam2014-05-09-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL register that can enable or disable low voltage on the pad. LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the calculation easier we can define it as a flag in bit 1, since this bit is unused. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-04-29-5429/+6132
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| * | | | mx6slevk: Add SPI NOR flash supportFabio Estevam2014-04-28-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
generated by cgit v1.1 at 2024-11-13 09:05:44 +0000