| Commit message (Collapse) | Author | Age | Lines |
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Without this the cache will only work in write-through mode, and as soon as
it is put in write-back mode things break.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Add full support for dram initialization, using a fixed clock and autodetection
of the memory organization (numbers of channels, bus-width, etc.).
This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK,
extended with extra initialization sequences and the autodetect algorithm
from boot0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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In preparation for adding sun6i dram support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Not used atm, for future use (e.g. PSCI).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Add clock_init_safe and clockset_pll5 functions, as these are needed for
SPL support resp. DRAM init (which is needed for SPL too).
Also add some extra clock register constant defines.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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The A31 uses a new push-pull two wire interface, which features higher
transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8
bytes each time, this driver will only see very little use and thus is
limited to single byte transmission only.
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and
it is defined in ./.config but not in spl/.config,
so pin_init() should be called from the normal image
so that UART works correctly.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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This commit merges
arch/arm/cpu/armv7/uniphier/ph1-*/board_postclk_init.c
to
arch/arm/cpu/armv7/uniphier/board_postclk_init.c
Because PH1-Pro4 does not have the BCU block, add __weak to
bcu_init().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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The function sg_set_pinsel is useful for switching I/O pins
but it can be only used in C code. This commit adds a simple
macro that is available in asm code.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Support EHCI host driver used on Panasonic UniPhier platform.
Since Device Tree is not supported on UniPhier yet, the base address
of USB cores are passed from board files (platdevice.c).
TODO for me:
Move the base address to device trees.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
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This commit adds register defines of MIO (Media I/O) block
of UniPhier platform. This file is necessary to control
the reset signals of the USB cores.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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These IO pins are necessary for port power control and
over current detect.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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If a support card is attached to the main board, the on-board
SMSC9118 LAN controller is available. It must be kept in reset
state for a while on start-up.
When the board is kicked via a debbuger rather than pushing the
hardware reset button, on-board chips are not reset; in this case
the reset signals should be asserted by software.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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This is a MIME GnuPG-signed message. If you see this text, it means that
your E-mail or Usenet software does not support MIME signed messages.
The Internet standard for MIME PGP messages, RFC 2015, was published in 1996.
To open this message correctly you will need to install E-mail or Usenet
software that supports modern Internet standards.
This reverts commit 1e96220a5687efae2aed45ce56e143336c40d0a7.
Remove duplicated vxworks.h header.
The same change was done by
"ARM: prevent compiler warnings from bootm.c"
(sha1: 8d196e52b58d1e50a80c2f5067b201cda521c75c)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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ppc4xx i2c master gets stuck on errors while repeated start is
active. Can be easily reproduced by "i2c md" on an unpopulated
i2c address. There is not stop condition given, scl remains
pulled low.
The only way out seems to be doing a stop manually and then a
soft reset.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
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Remove BFIN from the CPU macro in Makefile.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
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a hexadicemal value was missing the "0x" prefix which caused
assembler error
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
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Because CONFIG_MMU is never defined in U-Boot,
the non-MMU code in debug.S is always used.
Unfortunately, the number of arguments of the addruart macro
in Linux is different between MMU and non-MMU.
This causes a build error when importing some debug macros
using the third argument. (For ex. arch/arm/include/debug/exynos.S)
Pass the third argument to the non-MMU addruart to avoid such a problem.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
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We have not had a good method to debug the early boot stage such as
lowlevel_init function. I guess developers generally use dedicated
debuggers for that, but it is difficult in some cases.
(For example, my debugger cannot connect to the ARM processor when
it is in the secure state. It sometimes happens when I need to
debug the early boot stage on ARM SoCs with secure extension.)
The low level debug feature in Linux would be also helpful for U-boot
when we are stucking in nasty problems where the console is not
available yet.
You have to enable CONFIG_DEBUG_LL to use this feature.
For now, only 8250-compatible UART devices are supported.
You can add a header file under arch/arm/include/debug/ directory
to support your UART device if necessary.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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U-Boot does not have arch/arm/kernel, include/uapi directories,
This commit copies files as follows:
Location in Linux -> Location in U-Boot
arch/arm/kernel/debug.S -> arch/arm/lib/debug.S
arch/arm/include/debug/8250.S -> arch/arm/include/debug/8250.S
include/uapi/linux/serial_reg.h -> include/linux/serial_reg.h
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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cppcheck reports:
[arch/arm/cpu/arm926ejs/mxs/timer.c:96]: (error) Uninitialized
variable: now
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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There are a number of places where U-Boot intentionally and legally
accesses physical address 0x0000, for example when installing
exception vectors on systems where these are located in low memory.
Add "cppcheck-suppress nullPointer" comments to silence cppcheck
where this is intentional and legal.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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sandbox crashes if a variable is set in the -c command, because
hush's top_vars is not allocated. Call cli_init() from sandbox
to ensure this is done before we execute the -c command.
$ ./u-boot -c 'a=1'
...
Segmentation fault (core dumped)
Signed-off-by: Rabin Vincent <rabin@rab.in>
Acked-by: Simon Glass <sjg@chromium.org)
Tested-by: Simon Glass <sjg@chromium.org)
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CompuLab cm-t3517 is Computer on Module (CoM) based on AM3517 SoC.
Features: up to 256MB DDR2, up to 512MB NAND, USB hub, mUSB, WiFi, BT,
Analog audio codec, touch screen controller, LED.
Add basic support including:
LED, Serial console, NAND, MMC, GPIO, I2C, 256MB DRAM.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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Current get_board_rev() function returns a hard coded value which is
obviously incorrect for the majority of boards.
Allow boards to provide a correct implementation by making this
function weak.
In addition open code the trivial and useless BOARD_REV_ID define and
adjust the comment.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
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The Keystone2 Lamar SoC uses the same keystone net driver.
This patch adds opportunity to use it by K2L SoCs.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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Keystone2 Lamar SoC uses the same keystone SerDes driver.
All Keystone2 EVM boards currently use SerDes driver, so move
CONFIG_TI_KEYSTONE_SERDES to common configuration file.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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The Keystone2 Lamar SoC uses the same keystone navigator.
Move queue numbers to common hardware file, as all Keystone2 SoCs
have the same ones.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM.
The default boot address is 0x70000000.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM.
The default boot address is 0x70000000.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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If CONFIG_RMOBILE_EXTRAM_BOOT is enabled, U-Boot is booted from External RAM.
The default boot address is 0xB0000000.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The change of the CPU frequency is waited for until PLL0ST of the PLLECR is
set to 1.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Initialization of L2CTLR[5] was set only as R8A7790 by commit
237faf095fb43abbed6e40266ef7efccc8b9308b.
However, initialization of cash needs to be performed continuously.
This changes into the processing which continues initialization of
L2CTLR[5] into L2CTLR cash and performs it.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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On mx6 sabreauto board, there are two USB ports:
0: OTG
1: HOST
The EHCI driver is enabled for this board, but the IOMUX and VBUS power
control is not implemented, which cause both USB port failed to work.
This patch fix the problem by adding the board support codes.
Since the power control uses the GPIO pin from port expander MAX7310,
the PCA953X driver is enabled for accessing the MAX7310.
The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting
its daisy chain. Add a new function "imx_iomux_set_gpr_register" to
handle GPR register setting.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Set the USDHC1-3 IOMUX settings which are used for mx6slevk board.
Signed-off-by: Ye.Li <B37916@freescale.com>
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For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the
preclk setting with kernel.
Signed-off-by: Ye.Li <B37916@freescale.com>
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For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix
the get_ipg_per_clk function to support it.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The MX6SL has the perclk_clk_sel to select the perclk source. Add
its define in CCM
Signed-off-by: Ye.Li <B37916@freescale.com>
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Introduce a new configuration "CONFIG_MXC_GPT_HCLK". When it is set,
the GPT will select a high frequency clock as clock source.
Otherwise, the GPT will stay to use 32Khz OSC as clock source.
In the implementation, since only the GPT on i.MX6 series provide the
clock source option for 24Mhz OSC. For others (only i.MX5 and i.MX6
compile the driver), if the configuration is set, the perclk will be
selected as clock source.
MX6Q/D Rev 1.0 and MX6SL are special in the implementation, because they
don't have the 24Mhz OSC clock source option, so also select the perclk
for them. For MX6SL, we will set the OSC 24Mhz to perclk in CCM, so
eventually the clock comes from OSC 24Mhz.
Signed-off-by: Ye.Li <B37916@freescale.com>
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fix typos in video pll related register names and bit defines
Signed-off-by: Soeren Moch <smoch@web.de>
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Fix name for Video PLL denominator register.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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