summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
* ARM: tegra: MASK_BITS_ no longer needs specific valuesStephen Warren2014-02-03-1/+1
| | | | | | | | | | | | | | | | | | Since all code that sets or interprets MASK_BITS_* now uses the enums to define/compare the values, there is no need for MASK_BITS_* to have a specific integer value. In fact, having a specific integer value may encourage people to hard-code those values, or interpret the values in incorrect ways. As such, remove the logic that assigns a specific value to the enum values in order to make it completely clear that it's just an enum, not something that directly represents some integer value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: use MASK_BITS_* macros everywhereStephen Warren2014-02-03-3/+3
| | | | | | | | | | | | | | | | | | | | | | Not all code that set or interpreted "mux_bits" was using the named macros, but rather some was simply using hard-coded integer constants. This makes it hard to determine which pieces of code are affected by changes to those constants. Replace the integer constants with the equivalent macro definitions so that everything is nicely tied together. Note that I'm not convinced all the code was using the correct integer constants, and hence I'm not convinced that all the code is now using the desired macros. However, this change is a purely mechanical replacement and should have no functional change. Fixing any bugs will come later, separately. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: rename OUT_CLK_SOURCE_*Stephen Warren2014-02-03-12/+13
| | | | | | | | | | | | | | | OUT_CLK_SOURCE_ are currently named after the number of bits the mask they represent includes. However, bit count is not the only possible variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to OUT_CLK_SOURCE_31_30_ and OUT_CLK_SOURCE4_ to OUT_CLK_SOURCE_31_28 to more completely describe exactly what they represent, without having to go look up the definitions. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28Stephen Warren2014-02-03-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | The only place where the MASK_BITS_* values are used is in adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28, new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK, i.e. bits 31:28. Rename the MASK_BITS_ macro to reflect how it's actually implemented. Note that no Tegra clock register actually uses all of bits 31:28 as the mux field. Rather, bits 30:28, 29:28, or 28 are used. However, in those cases, nothing is stored in the bits above the mux field, so it's safe to pretend that the mux field extends all the way to the end of the register. As such, the U-Boot clock driver is currently a bit lazy, and doesn't distinguish between 31:28, 30:28, 29:28 and 28; it just lumps them all together and pretends they're all 31:28. This patch doesn't cause this issue; it was pre-existing. Hopefully, future patches will clean this up. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: deduplicate MASK_BITS_xxx clock mux enumTom Warren2014-02-03-12/+6
| | | | | | | | | | | | | | | The enum used to define the set of register bits used to represent a clock's input mux, MUX_BITS_*, is defined separately for each SoC at present. Move this definition to a common location to ease fixing up some issues with the definition, and the code that uses it. Signed-off-by: Tom Warren <twarren@nvidia.com> [swarren, extracted from a larger patch by Tom] Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: accept any SKU ID for most chipsStephen Warren2014-02-03-0/+2
| | | | | | | | | | | | | | | | | | For Tegra20, the SKU ID actually impacts how U-Boot programs the chip, and hence we need to explicitly know about each and every SKU ID in order to operate correctly. However, for Tegra30/114, this isn't the case. Rather than forcing each new user with a different SKU to manually add their SKU ID into the code, simply accept any SKU ID. If U-Boot ever starts e.g. programming maximal CPU clocks etc., we'll need to undo this, or make the default case map to conservative defaults, but for now it's likely the path to least support cost. Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-29-248/+40
|\
| * DRA7: add ABB setup for MPU voltage domainNishanth Menon2014-01-24-3/+20
| | | | | | | | | | | | | | | | | | Patch adds modification to shared omap5 abb_setup() function, and proper registers definitions needed for ABB setup sequence. ABB is initialized for MPU voltage domain at OPP_NOM. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * DRA7: Add support for ES1.1 silicon ID codeNishanth Menon2014-01-24-3/+13
| | | | | | | | | | | | | | | | ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support for ES1.1 IDCODE change. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * ARM: AM335x: Enable DDR dynamic IO power downSatyanarayana, Sandhya2014-01-24-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables dynamically powering down the IO receiver when not performing a read on boards using DDR3. This optimizes both active and standby power consumption. This bit is not set on EVM SK and EVM 1.5 and later boards. Setting the same. This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
| * ARM: OMAP3: Rename OMAP3_PUBLIC_SRAM_* to NON_SECURE_SRAM_*Enric Balletbò i Serra2014-01-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Other TI processors like am33xx, omap4 and omap5 have called these variables as NON_SECURE_SRAM_*, shouldn't be a big problem rename these variables to be coherent. One reason more to rename these variables is to have the possibility of any OMAP3 board to use the ti_armv7_common.h include as the NON_SECURE_SRAM_END is used to define the CONFIG_SYS_INIT_SP_ADDR variable. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
| * ARM: OMAP4/5: Remove dead code against CONFIG_SYS_ENABLE_PADS_ALLJassi Brar2014-01-24-8/+0
| | | | | | | | | | | | | | | | | | The commit f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls" removed the config option aimed towards moving that stuff into kernel, which renders some code unreachable. Remove that code. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
| * ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALLJassi Brar2014-01-24-227/+0
| | | | | | | | | | | | | | | | | | The commit f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls" removed the config option aimed towards moving that stuff into kernel, which renders some code unreachable. Remove that code. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
* | spl: common: Support for USB MSD FAT image loadingDan Murphy2014-01-24-3/+11
| | | | | | | | | | | | | | | | Add SPL support to be able to detect a USB Mass Storage device connected to a USB host. Once a USB Mass storage device is detected the SPL will load the u-boot.img from a FAT partition to target address. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* | powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definitionMasahiro Yamada2014-01-24-2/+0
| | | | | | | | | | | | | | We do not have to define CONFIG_MPC5xxx in board config headers (and start.S) because it is defined in arch/powerpc/cpu/mpc5xxx/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | sandbox: fix the return type of os_free() functionMasahiro Yamada2014-01-24-1/+1
| | | | | | | | | | | | | | The function os_free() returns nothing. Its return type should be "void" rather than "void *". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: merge commonly-defined PLATFORM_RELFLAGSMasahiro Yamada2014-01-24-82/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, all arch/arm/cpu/${CPU}/config.mk except ARMv8 had the same option: $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) This commit moves it into arch/arm/config.mk. If the compiler does not support the option, it is ignored by $(call cc-option,...). So this commit gives no harm to ARMv8. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mkMasahiro Yamada2014-01-24-1/+1
| | | | | | | | | | | | | | Define CONFIG_MPC86xx in arch/powerpc/cpu/mpc86xx/config.mk because all target boards with mpc86xx cpu define it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mkMasahiro Yamada2014-01-24-1/+1
| | | | | | | | | | | | | | Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk because all target boards with mpc85xx cpu define it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc5xx: remove redundant CONFIG_5xx definitionMasahiro Yamada2014-01-24-2/+0
| | | | | | | | | | | | | | We do not have to define CONFIG_5xx in a source file because it is defined in arch/powerpc/cpu/mpc5xx/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc8xx: remove redundant CONFIG_8xx definitionMasahiro Yamada2014-01-24-4/+0
| | | | | | | | | | | | | | We do not have to define CONFIG_8xx in source files because it is defined in arch/powerpc/cpu/mpc8xx/config.mk Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | x86: delete unused header filesMasahiro Yamada2014-01-24-193/+0
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | powerpc: delete unused header filesMasahiro Yamada2014-01-24-1261/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | blackfin: delete unused header filesMasahiro Yamada2014-01-24-151/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | avr32: delete unused header filesMasahiro Yamada2014-01-24-228/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | avr32: move CONFIG_AVR32 definition to arch/avr32/config.mkMasahiro Yamada2014-01-24-1/+1
| | | | | | | | | | | | | | | | | | Like other architectures, CONFIG_AVR32 can be defined in arch/avr32/config.mk rather than board header files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Remove obsolete _LINUX_CONFIG_H macroMasahiro Yamada2014-01-24-18/+0
| | | | | | | | | | | | | | | | | | Commit 643aae1406c93ddc64fcf8c136b47cdffd9c8ccd deleted include/linux/config.h but missed to delete _LINUX_CONFIG_H macro. It is no longer used at all. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | lib: time: add weak timer_init() functionDarwin Rambo2014-01-24-10/+0
| | | | | | | | | | | | | | | | | | | | If timer_init() is made a weak stub function, then it allows us to remove several empty timer_init functions for those boards that already have a timer initialized when u-boot starts. Architectures that use the timer framework may also remove the need for timer.c. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
* | eSDHC: Calculate envaddr accroding to the address formatHaijun.Zhang2014-01-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the 32-bit source address specifies the memory address in block address format. Block length is fixed to 512 bytes as per the SD High Capacity specification. So we need to convert the block address format to byte address format to calculate the envaddr. If there is no enough space for environment variables or envaddr is larger than 4GiB, we relocate the envaddr to 0x400. The address relocated is in the front of the first partition that is assigned for sdboot only. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | powerpc:mpc85xx: Add ifc nand boot support for TPL/SPLPo Liu2014-01-21-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | powerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474York Sun2014-01-21-1/+1
| | | | | | | | | | | | Unfortunately a typo presents "DDR-A003473" instead of "DDR-A003474". Signed-off-by: York Sun <yorksun@freescale.com>
* | powerpc/85xx: update erratum a006379Shengzhou Liu2014-01-21-1/+5
| | | | | | | | | | | | | | Enable Erratum A006379 for T2080, T2081, T4160, B4420. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | powerpc/83xx: Add support for get_svr() for 83xx devicesRamneek Mehresh2014-01-21-0/+5
| | | | | | | | | | | | | | Defines get_svr() for 83xx devices Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | ARM: bcm2835: fix mailbox timeoutStephen Warren2014-01-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | My original intention was to have a 100ms timeout. However, the timer operations used return values in ms not us, so we ended up with a 100s timeout instead. Fixing this exposes that some operations need longer to operate than 100ms, so bump the timeout up to a whole second. Reported-by: Andre Heider <a.heider@gmail.com> Reviewed-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | ARM: rpi_b: power on SDHCI and USB HW modulesStephen Warren2014-01-20-0/+48
| | | | | | | | | | | | | | | | | | | | Send RPC commands to the VideoCore to turn on the SDHCI and USB modules. For SDHCI this isn't needed in practice, since the firmware already turned on the power in order to load U-Boot. However, it's best to be explicit. For USB, this is necessary, since the module isn't powered otherwise. This will allow the kernel USB driver to work. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-01-20-65/+0
|\ \
| * | mx6: Revert "mx6: soc: Disable VDDPU regulator"Fabio Estevam2014-01-17-65/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang for people using FSL kernel 3.0.35 and 3.10, so revert it for now. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Reported-by: Pierre Aubert <p.aubert@staubli.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-16-2/+21
|\ \ \ | | |/ | |/|
| * | arm: rmobile: Add SH QSPI base register addressNobuhiro Iwamatsu2014-01-16-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This adds base register address of SH QSPI. Currently, SH QSPI is used only from R8A7790 and R8A7791. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-15-2/+19
| |\ \ | | |/
| | * mx6: Add initial support for the Hummingboard soloFabio Estevam2014-01-15-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SolidRun has designed the Hummingboard board based on mx6q/dl/solo. Add the initial support for the mx6 solo variant. More information about this hardware can be found at: http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware (Carrier-One was the previous name of Hummingboard). Based on the work from Jon Nettleton <jon.nettleton@gmail.com>. Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()Fabio Estevam2014-01-15-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide an argument to enable_fec_anatop_clock() to specify the clock frequency that will be generated. No changes are made to mx6slevk, which uses the default 50MHz fec clock. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-14-6/+13
|\ \ \ | |/ /
| * | arm: use canonical sub mnemonicAndreas Bießmann2014-01-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building some arm boards with older binutils may produce errors like this: ---8<--- crt0.S: Assembler messages: crt0.S:70: Error: register expected, not '#(184)' -- `sub sp,#(184)' --->8--- Use canonical version of the subtract mnemonic to avoid those issues. Reported-by: Alexey Smishlayev <alexey@xtech2.lv> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | Merge 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-14-1/+2
| |\ \ | | |/
| | * imx6: make use of lldiv(..)Christian Gmeiner2014-01-13-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 762a88ccf8540948fbf8c31b40a29d1e0684a25b introduces a 64-bit division without using the lldiv() function, which pulls in previously unused libgcc stuff. Signed-off-by: Måns Rullgård <mans@mansr.com> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | arm: put .hash, .got.plt and .machine_param back in binariesAlbert ARIBAUD2014-01-14-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some targets will build fine but not boot if sections .hash and .got.plt are not present in the binary. Add them back. Also, Exynos machines require .machine_param section in SPL. Add it. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-13-0/+13
|\ \ \ | |/ /
| * | ARM: pxa: Fix OneNAND SPL buildsMarek Vasut2014-01-13-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
* | | usb: ehci: exynos: set/reset hsic physInderpal Singh2014-01-13-0/+14
|/ / | | | | | | | | | | | | | | The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
generated by cgit v1.1 at 2024-11-15 03:18:51 +0000