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* x86: Add the root-complex block to common intel registersSimon Glass2016-03-17-5/+4
* x86: Create a common header for Intel register accessSimon Glass2016-03-17-3/+15
* x86: Move microcode code to a common locationSimon Glass2016-03-17-0/+0
* x86: cpu: Add functions to return the family and steppingSimon Glass2016-03-17-0/+14
* x86: Add comments to the SIPI vectorSimon Glass2016-03-17-0/+1
* x86: Correct duplicate POST valuesSimon Glass2016-03-17-2/+2
* x86: gpio: Correct GPIO setup orderingSimon Glass2016-03-17-0/+5
* x86: Add some more common MSR indexesSimon Glass2016-03-17-18/+40
* x86: Support booting SeaBIOSBin Meng2016-03-17-0/+3
* x86: Implement functions for writing coreboot tableBin Meng2016-03-17-0/+10
* x86: Change write_acpi_tables() signature a little bitBin Meng2016-03-17-1/+1
* x86: Use a macro for ROM table alignmentBin Meng2016-03-17-0/+2
* x86: Clean up coreboot_tables.hBin Meng2016-03-17-73/+80
* x86: Move sysinfo related to sysinfo.hBin Meng2016-03-17-4/+2
* x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng2016-03-17-1/+1
* x86: ivybridge: Add FSP supportBin Meng2016-02-21-0/+52
* x86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLEBin Meng2016-02-05-7/+0
* x86: pci: Drop legacy PCI APIsBin Meng2016-02-05-12/+0
* x86: irq: Move irq_router to a per driver privBin Meng2016-02-05-4/+8
* x86: Drop asm/arch/gpio.hBin Meng2016-02-05-89/+0
* x86: qemu: add the ability to load and link ACPI tables from QEMUMiao Yan2016-01-28-0/+61
* x86: qemu: setup PM IO base for ACPI in southbridgeMiao Yan2016-01-28-0/+7
* x86: qemu: re-structure qemu_fwcfg_list_firmware()Miao Yan2016-01-28-3/+6
* x86: baytrail: Add option to disable the internal UART to setup_early_uart()Stefan Roese2016-01-28-1/+1
* x86: ivybridge: Use syscon for the GMA deviceSimon Glass2016-01-24-2/+4
* x86: Set up a shared syscon numbering schemaSimon Glass2016-01-24-0/+9
* x86: ivybridge: Drop XHCI supportSimon Glass2016-01-24-1/+0
* x86: ivybridge: Drop special EHCI initSimon Glass2016-01-24-1/+0
* x86: ivybridge: Sort out the calls to bridge_silicon_revision()Simon Glass2016-01-24-1/+7
* x86: ivybridge: Move code from pch.c to bd82x6x.cSimon Glass2016-01-24-18/+0
* x86: ivybridge: Convert pch.c to use DM PCI APISimon Glass2016-01-24-5/+37
* x86: ivybridge: Convert report_platform to DM PCI APISimon Glass2016-01-24-1/+1
* x86: ivybridge: Convert SDRAM init to use driver modelSimon Glass2016-01-24-5/+40
* x86: ivybridge: Move LPC init into the LPC probe() methodSimon Glass2016-01-24-2/+0
* x86: ivybridge: Move lpc_enable() into gma.cSimon Glass2016-01-24-1/+0
* x86: ivybridge: Use the SATA driver to do the initSimon Glass2016-01-24-1/+0
* x86: ivybridge: Drop the unused bd82x6x_init_extra()Simon Glass2016-01-24-1/+0
* x86: ivybridge: Do the SATA init before relocationSimon Glass2016-01-24-1/+0
* x86: ivybridge: Use driver model PCI API in bd82x6x.cSimon Glass2016-01-24-3/+0
* x86: ivybridge: Move northbridge and PCH init into driversSimon Glass2016-01-24-1/+0
* x86: Make x86_init_cpus() staticSimon Glass2016-01-24-2/+0
* x86: ivybridge: Move CPU init code into the driverSimon Glass2016-01-24-15/+0
* x86: ivybridge: Rename lpc_init() to lpc_init_extra()Simon Glass2016-01-24-1/+1
* x86: ivybridge: Rename bd82x6x_init()Simon Glass2016-01-24-1/+1
* x86: ivybridge: Move lpc_early_init() to probe()Simon Glass2016-01-24-10/+0
* dm: x86: Drop the weak cpu_irq_init() functionSimon Glass2016-01-24-10/+0
* dm: x86: Add a common PIRQ init functionSimon Glass2016-01-24-0/+7
* dm: x86: Set up interrupt routing from interrupt_init()Simon Glass2016-01-24-10/+0
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-12/+1
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-14-29/+159
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