summaryrefslogtreecommitdiff
path: root/arch/x86/dts/chromebox_panther.dts
Commit message (Collapse)AuthorAgeLines
* x86: Remove unused rw-mrc-cache properties in the link and panther dts filesBin Meng2015-10-21-3/+0
| | | | | | | | | "type" and "wipe-value" are never used by the mrccache codes. Remove them to avoid confusion. This also removes the alignment comment in the panther dts file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: panther: Add PCI and video configurationSimon Glass2015-09-09-0/+10
| | | | | | | | | Add a PCI node to the device tree. This allows SPI flash and SATA to work correctly. Also configure the video to come up correctly even though there is no keyboard. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass2015-08-31-0/+5
| | | | | | | | | Add a TPM node to the various Chromebooks so that driver can be converted to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-0/+1
| | | | | | | | Add a RTC node in the device tree to enable DM RTC support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> (Squashed in 'x86: Fix RTC build error on ivybridge')
* x86: Add support for panther (Asus Chromebox)Simon Glass2015-04-16-0/+64
Support running U-Boot as a coreboot payload. Tested peripherals include: - Video (HDMI and DisplayPort) - SATA disk - Gigabit Ethernet - SPI flash USB3 does not work. This may be a problem with the USB3 PCI driver or something in the USB3 stack and has not been investigated So far this is disabled. The SD card slot also does not work. For video, coreboot will need to run the OPROM to set this up. With this board, bare support (running without coreboot) is not available as yet. Signed-off-by: Simon Glass <sjg@chromium.org>