summaryrefslogtreecommitdiff
path: root/arch/x86/cpu
Commit message (Expand)AuthorAgeLines
* arm: x86: Drop command-line code when CONFIG_CMDLINE is disabledSimon Glass2016-03-22-0/+4
* x86: Support a chained-boot development flowSimon Glass2016-03-17-0/+80
* x86: ivybridge: Convert to use the common SDRAM codeSimon Glass2016-03-17-311/+83
* x86: Add common SDRAM-init codeSimon Glass2016-03-17-0/+272
* x86: Move common PCH code into a common placeSimon Glass2016-03-17-31/+43
* x86: Add a function to set the IOAPIC IDSimon Glass2016-03-17-0/+16
* x86: broadwell: Add support for high-speed I/O lane with MESimon Glass2016-03-17-0/+58
* x86: broadwell: Add support for SDRAM setupSimon Glass2016-03-17-0/+308
* x86: broadwell: Add power-control supportSimon Glass2016-03-17-0/+91
* x86: broadwell: Add reference code supportSimon Glass2016-03-17-0/+114
* x86: broadwell: Add an LPC driverSimon Glass2016-03-17-0/+78
* x86: broadwell: Add a northbridge driverSimon Glass2016-03-17-0/+60
* x86: broadwell: Add a SATA driverSimon Glass2016-03-17-0/+270
* x86: broadwell: Add a pinctrl driverSimon Glass2016-03-17-0/+279
* x86: broadwell: Add a PCH driverSimon Glass2016-03-17-0/+686
* x86: Add basic support for broadwellSimon Glass2016-03-17-0/+799
* x86: Update microcode for secondary CPUsSimon Glass2016-03-17-2/+7
* x86: ivybridge: Show microcode version for each coreSimon Glass2016-03-17-1/+2
* x86: Record the CPU details when starting each coreSimon Glass2016-03-17-1/+11
* x86: Move common MRC Kconfig options to the common fileSimon Glass2016-03-17-26/+1
* x86: Move Intel Management Engine code to a common placeSimon Glass2016-03-17-35/+25
* x86: Rename PORT_RESET to IO_PORT_RESETSimon Glass2016-03-17-4/+4
* x86: Move common CPU code to its own placeSimon Glass2016-03-17-74/+118
* x86: Move common LPC code to its own placeSimon Glass2016-03-17-83/+107
* x86: Add the root-complex block to common intel registersSimon Glass2016-03-17-2/+5
* x86: Create a common header for Intel register accessSimon Glass2016-03-17-3/+7
* x86: Move microcode code to a common locationSimon Glass2016-03-17-4/+8
* x86: Move cache-as-RAM code into a common locationSimon Glass2016-03-17-1/+8
* x86: cpu: Add functions to return the family and steppingSimon Glass2016-03-17-0/+10
* x86: Add comments to the SIPI vectorSimon Glass2016-03-17-0/+1
* x86: Tidy up mp_init to reduce duplicationSimon Glass2016-03-17-53/+26
* x86: Add some more common MSR indexesSimon Glass2016-03-17-2/+3
* x86: cpu: Make the vendor table constSimon Glass2016-03-17-1/+1
* x86: Change write_acpi_tables() signature a little bitBin Meng2016-03-17-3/+2
* x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng2016-03-17-2/+0
* dm: Use uclass_first_device_err() where it is usefulSimon Glass2016-03-14-19/+11
* x86: Add Intel Cougar Canyon 2 boardBin Meng2016-02-21-0/+4
* x86: ivybridge: bd82x6x: Support FSP enabled configurationBin Meng2016-02-21-1/+5
* x86: ivybridge: Add FSP supportBin Meng2016-02-21-0/+79
* x86: fix memalign() parameter orderStephen Warren2016-02-21-1/+1
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2016-02-08-1/+1
|\
| * Use correct spelling of "U-Boot"Bin Meng2016-02-06-1/+1
* | x86: quark: Use Quark's own PCI config APIsBin Meng2016-02-05-2/+3
* | x86: pci: Drop legacy PCI APIsBin Meng2016-02-05-53/+0
* | x86: pci: Use DM PCI APIs in pci_assign_irqs()Bin Meng2016-02-05-3/+3
* | x86: qemu: Convert to use DM PCI APIBin Meng2016-02-05-17/+17
* | x86: tnc: Remove IGD and SDVO devices from driver modelBin Meng2016-02-05-0/+36
* | x86: tnc: Use DM PCI API in disable_igd()Bin Meng2016-02-05-3/+19
* | x86: tnc: Change disable_igd() to have a return valueBin Meng2016-02-05-3/+7
* | x86: irq: Convert to use DM PCI APIBin Meng2016-02-05-4/+4
generated by cgit v1.1 at 2024-12-23 22:44:17 +0000