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* x86: Add relocation and link script for a 64-bit EFI applicationSimon Glass2015-08-05-0/+83
* x86: Add support for U-Boot as an EFI applicationBen Stoltz2015-08-05-0/+180
* x86: Tidy up a few minor issues with interruptsSimon Glass2015-08-05-5/+4
* x86: Add some missing global_data declarations in files that use gdSimon Glass2015-08-05-0/+2
* x86: Tidy up the 64-bit calling codeSimon Glass2015-08-05-2/+2
* x86: Tidy up global_data flagsSimon Glass2015-08-05-3/+7
* x86: Use CR0 constants in CPU initSimon Glass2015-08-05-1/+1
* x86: Add various minor tidy-ups to the 32-bit startup codeSimon Glass2015-08-05-20/+26
* x86: bayleybay: Configure PCI IRQBin Meng2015-08-05-0/+8
* x86: qemu: Turn on PCIe ECAM address range decoding on Q35Bin Meng2015-07-28-0/+4
* x86: qemu: Enable writing MP tableBin Meng2015-07-28-3/+31
* x86: Allow cpu-x86 driver to be probed for UPBin Meng2015-07-28-0/+9
* x86: qemu: Enable I/O APIC chip select on PIIX3Bin Meng2015-07-28-1/+6
* x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-28-52/+0
* x86: pci: Do not assign irq 0 to pci deviceBin Meng2015-07-28-0/+2
* x86: pci: Assign pci irqs to all functionsBin Meng2015-07-28-10/+17
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-9/+24
* x86: Change pci option rom area MTRR setting to cacheableBin Meng2015-07-28-7/+20
* x86: Simplify architecture defined exception handling in irq_llsr()Bin Meng2015-07-28-105/+46
* x86: Display correct CS/EIP/EFLAGS when there is an error codeBin Meng2015-07-28-1/+28
* Kill unneeded #include <linux/kconfig.h>Masahiro Yamada2015-07-27-1/+0
* dm: x86: baytrail: Correct PCI region 3 when driver model is usedSimon Glass2015-07-14-0/+2
* dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-14-47/+0
* x86: pci: Tidy up the generic x86 PCI driverSimon Glass2015-07-14-22/+0
* x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng2015-07-14-0/+4
* x86: Setup fixed range MTRRs for legacy regionsBin Meng2015-07-14-0/+22
* x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-14-6/+7
* x86: Remove inline for lapic access routinesBin Meng2015-07-14-27/+143
* x86: Add I/O APIC register access routinesBin Meng2015-07-14-1/+22
* x86: Reduce PIRQ routing table sizeBin Meng2015-07-14-9/+56
* x86: Ignore function number when writing PIRQ routing tableBin Meng2015-07-14-4/+3
* x86: Write correct bus number for the irq routerBin Meng2015-07-14-1/+1
* x86: Clean up lapic codesBin Meng2015-07-14-22/+18
* x86: Move lapic_setup() call into init_bsp()Bin Meng2015-07-14-3/+1
* x86: Move MP initialization codes into a common placeBin Meng2015-07-14-72/+112
* x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONSBin Meng2015-07-14-1/+0
* x86: dm: Clean up cpu driversBin Meng2015-07-14-41/+52
* x86: fsp: Move FspInitEntry call to board_init_f()Bin Meng2015-07-14-1/+5
* x86: fsp: Load GDT before calling FspInitEntryBin Meng2015-07-14-2/+23
* x86: Add Kconfig options to be used by arch/x86/cpu/config.mkBin Meng2015-07-14-3/+3
* x86: baytrail: pci region 3 is not always mapped to end of ramAndrew Bradford2015-06-04-1/+1
* x86: qemu: Implement PIRQ routingBin Meng2015-06-04-0/+13
* x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2015-06-04-3/+9
* x86: coreboot: Fix cosmetic issuesBin Meng2015-06-04-24/+3
* x86: qemu: Adjust VGA initializationBin Meng2015-06-04-19/+15
* x86: qemu: Enable legacy IDE I/O ports decodeBin Meng2015-06-04-0/+14
* x86: qemu: Turn on legacy segments decodeBin Meng2015-06-04-0/+20
* x86: Do sanity test on pirq table before writingBin Meng2015-06-04-0/+3
* x86: quark: Implement PIRQ routingBin Meng2015-06-04-0/+31
* x86: Refactor PIRQ routing supportBin Meng2015-06-04-245/+253
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