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* x86: qemu: rename qemu/acpi_table.cMiao Yan2016-05-23-2/+1
| | | | | | | | Rename qemu/acpi_table.c to qemu/e820.c, because ACPI stuff is moved to qfw core, this file only contains code for installing e820 table. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* cmd: qfw: bring ACPI generation code into qfw coreMiao Yan2016-05-23-209/+0
| | | | | | | | Loading ACPI table from QEMU's fw_cfg interface is not x86 specific (ARM64 may also make use of it). So move the code to common place. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]Miao Yan2016-05-23-3/+3
| | | | | | | Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: add comment about qfw register endiannessMiao Yan2016-05-23-1/+8
| | | | | | | This patch adds some comments about qfw register endianness for clarity. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: move x86 specific operations out of qfw coreMiao Yan2016-05-23-1/+38
| | | | | | | | | | | The original implementation of qfw includes several x86 specific operations, like directly calling outb/inb and using some inline assembly code which prevents it being ported to other architectures. This patch adds callback functions and moves those to arch/x86/ Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: split qfw command interface and qfw coreMiao Yan2016-05-23-1/+4
| | | | | | | | | | | | This patch splits qfw command interface and qfw core function into two files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core. Now when qfw command interface is enabled, it will automatically select qfw core. This patch also makes the ACPI table generation select CONFIG_QFW. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* cmd: qfw: remove qemu_fwcfg_free_files()Miao Yan2016-05-23-2/+11
| | | | | | | | | | | This patch is part of the qfw refactor work. The qemu_fwcfg_free_files() function is only used in error handling in ACPI table generation, let's not make this a core function and move it to the right place. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: fix ACPI Kconfig optionsMiao Yan2016-05-23-1/+1
| | | | | | | | | | | | | | | CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether to load ACPI table from QEMU's fw_cfg interface. But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop our own ACPI implementation", there is only one way to support ACPI table for QEMU targets which is the fw_cfg interface. Having two Kconfig options for this purpose is not necessary any more, so this patch consolidates the two. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: Move qfw command over to cmd and add Kconfig entryTom Rini2016-05-23-573/+247
| | | | | | | | | | - Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into cmd/qemu_fw_cfg.c - Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h - Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Correct typo of Miao Yan's email addressBin Meng2016-04-22-1/+1
| | | | | | Miao Yan's email address is wrong in fw_cfg.c. Fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: Drop our own ACPI implementationBin Meng2016-04-22-890/+0
| | | | | | | | | | | | Our own ACPI implementation (when CONFIG_QEMU_ACPI_TABLE is not set) does not build anymore after x86 has been fully converted to DM PCI. Instead of trying to fix the build errors, given we now have the ACPI support via QEMU's fw_cfg interface, which is a more reliable way to generate correct ACPI tables than by ourselves, hence drop our own ACPI implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: Change write_acpi_tables() signature a little bitBin Meng2016-03-17-3/+2
| | | | | | | | Change the parameter and return value of write_acpi_tables() to u32 to conform with other table write routines. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Convert to use DM PCI APIBin Meng2016-02-05-17/+17
| | | | | | | | Use pci_[read|write]_config intead of x86_pci_[read|write]_config. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: qemu: add the ability to load and link ACPI tables from QEMUMiao Yan2016-01-28-0/+255
| | | | | | | | | | | This patch adds the ability to load and link ACPI tables provided by QEMU. QEMU tells guests how to load and patch ACPI tables through its fw_cfg interface, by adding a firmware file 'etc/table-loader'. Guests are supposed to parse this file and execute corresponding QEMU commands. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: setup PM IO base for ACPI in southbridgeMiao Yan2016-01-28-0/+36
| | | | | | | | Enable ACPI IO space for piix4 (for pc board) and ich9 (for q35 board) Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: re-structure qemu_fwcfg_list_firmware()Miao Yan2016-01-28-14/+49
| | | | | | | | | Re-write the logic in qemu_fwcfg_list_firmware(), add a function qemu_fwcfg_read_firmware_list() to handle reading firmware list. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: x86: Set up interrupt routing from interrupt_init()Simon Glass2016-01-24-5/+0
| | | | | | | | | | | | | | | At present interrupt routing is set up from arch_misc_init(). We can do it a little later instead, in interrupt_init(). This removes the manual pirq_init() call. Where the platform does not have an interrupt router defined in its device tree, no error is generated. Some platforms do not have this. Drop pirq_init() since it is no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: fix cpu device in smp bootMiao Yan2016-01-13-11/+0
| | | | | | | | | | | | | | | | Currently, when booting with more that one CPU enabled, U-Boot scans 'cpu' node in device tree and calculates CPU number. This does not scale well as changing CPU number also requires modifying .dts and re-compiling U-Boot. This patch uses fw_cfg interface provided by QEMU to detect online CPU number at runtime, and dynamically adds 'cpu' device to U-Boot's driver model. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: add a cpu uclass driver for qemu targetMiao Yan2016-01-13-1/+58
| | | | | | | | | | | | | | | Add a cpu uclass driver for qemu. Previously, the qemu target gets cpu number from board dts files, which are manually created at compile time. This does not scale when more cpus are assigned to guest as the dts files must be modified as well. This patch adds a cpu uclass driver for qemu targets to directly read online cpu number from firmware. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: add fw_cfg supportMiao Yan2016-01-13-1/+287
| | | | | | | | | | | | | The QEMU fw_cfg interface allows the guest to retrieve various data information from QEMU. For example, APCI/SMBios tables, number of online cpus, kernel data and command line, etc. This patch adds support for QEMU fw_cfg interface. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: tsc: Remove legacy timer codesBin Meng2015-12-01-1/+0
| | | | | | | | | | | Now that we have converted all x86 boards to use driver model timer, remove these legacy timer codes in the tsc driver. Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option, as it is not needed with driver model. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Convert to use driver model timerBin Meng2015-12-01-3/+0
| | | | | | | Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Convert to use driver model pciBin Meng2015-11-13-50/+0
| | | | | | | Move to driver model for pci on QEMU. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Move chipset-specific codes from pci.c to qemu.cBin Meng2015-11-13-72/+82
| | | | | | | | Move chipset-specific codes such as PAM init, PCIe ECAM and MP table from pci.c to qemu.c, to prepare for DM PCI conversion. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Remove call to vgabios executionBin Meng2015-11-13-18/+1
| | | | | | | | The call to pci_run_vga_bios() is not needed as this is handled in the vesa_fb driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Add DSDT table for supporting ACPI on QEMUSaket Sinha2015-08-26-1/+712
| | | | | | | | The DSDT table contains a bytecode that is executed by a driver in the kernel. Signed-off-by: Saket Sinha <saket.sinha89@gmail.com> Tested with QEMU '-M q35' Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add ACPI table support to QEMUSaket Sinha2015-08-26-0/+177
| | | | | | | | | This patch mainly adds ACPI support to QEMU. Verified by booting Linux kernel on QEMU Q35. Signed-off-by: Saket Sinha <saket.sinha89@gmail.com> Minor whitespace fixes and dropped mention of i440FX in commit message: Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Allow pirq_init() to return an errorSimon Glass2015-08-14-3/+1
| | | | | | | | This function can fail. In this case we should return the error rather than swallowing it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: Support operation as an EFI payloadSimon Glass2015-08-05-1/+6
| | | | | | | | | Disable a few things which interfere with the EFI init. This allows QEMU to to boot into EFI, load a U-Boot payload then boot to the U-Boot prompt. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: Turn on PCIe ECAM address range decoding on Q35Bin Meng2015-07-28-0/+4
| | | | | | | Turn on PCIe ECAM address range decoding on Q35. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Enable writing MP tableBin Meng2015-07-28-3/+31
| | | | | | | Enable writing MP table for QEMU boads (i440fx and q35). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Enable I/O APIC chip select on PIIX3Bin Meng2015-07-28-1/+6
| | | | | | | | The PIIX3 chipset does not integrate an I/O APIC, instead it supports connecting to an external I/O APIC which needs to be enabled manually. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Implement PIRQ routingBin Meng2015-06-04-0/+8
| | | | | | | | | Support QEMU PIRQ routing via device tree on both i440fx and q35 platforms. With this commit, Linux booting on QEMU from U-Boot has working ATA/SATA, USB and ethernet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Adjust VGA initializationBin Meng2015-06-04-19/+15
| | | | | | | | | | | | | As VGA option rom needs to run at C segment, although QEMU PAM emulation seems to only guard E/F segments, for correctness, move VGA initialization after PAM decode C/D/E/F segments. Also since we already tested QEMU targets to differentiate I440FX and Q35 platforms, change to locate the VGA device via hardcoded b.d.f instead of dynamic search for its vendor id & device id pair. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Enable legacy IDE I/O ports decodeBin Meng2015-06-04-0/+14
| | | | | | | | | QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix driver does sanity check to see whether legacy ports decode is turned on. To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Turn on legacy segments decodeBin Meng2015-06-04-0/+20
| | | | | | | | | By default the legacy segments C/D/E/F do not decode to system RAM. Turn on the decode via Programmable Attribute Map (PAM) registers so that we can write configuration tables in the F segment. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Add graphics supportBin Meng2015-06-04-1/+23
| | | | | | | | It turns out that QEMU x86 emulated graphic card has a built-in option ROM which can be run perfectly with native mode by U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Support QEMU x86 targetsBin Meng2015-06-04-0/+187
This commit introduces the initial U-Boot support for QEMU x86 targets. U-Boot can boot from coreboot as a payload, or directly without coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Merged in patch 'x86: qemu: Add CMD_NET to qemu-x86_defconfig https://patchwork.ozlabs.org/patch/479745/
generated by cgit v1.1 at 2024-07-19 21:46:57 +0000