Commit message (Expand) | Author | Age | Lines | ||
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... | |||||
* | x86: ivybridge: Add LAPIC support | Simon Glass | 2014-11-21 | -0/+3 | |
* | x86: ivybridge: Add early init for PCH devices | Simon Glass | 2014-11-21 | -0/+287 | |
* | x86: ivybridge: Perform Intel microcode update on boot | Simon Glass | 2014-11-21 | -0/+157 | |
* | x86: ivybridge: Check BIST value on boot | Simon Glass | 2014-11-21 | -0/+16 | |
* | x86: ivybridge: Perform initial CPU setup | Simon Glass | 2014-11-21 | -0/+130 | |
* | x86: ivybridge: Add early LPC init so that serial works | Simon Glass | 2014-11-21 | -0/+61 | |
* | x86: ivybridge: Enable PCI in early init | Simon Glass | 2014-11-21 | -0/+67 | |
* | x86: chromebook_link: Implement CAR support (cache as RAM) | Simon Glass | 2014-11-21 | -2/+162 | |
* | x86: Add chromebook_link board | Simon Glass | 2014-11-21 | -0/+262 |