arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	x86: ivybridge: Fix car_uninit() to correctly set run state	Simon Glass	2015-10-21	-1/+1
\| \| \| \| \| \| \| \|	At present a missing $ causes this code to hang when using the MRC cache/ Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
*	x86: Add multi-processor init	Simon Glass	2015-04-30	-0/+1
\| \| \| \| \| \| \| \| \|	Most modern x86 CPUs include more than one CPU core. The OS normally requires that these 'Application Processors' (APs) be brought up by the boot loader. Add the required support to U-Boot to init additional APs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
*	x86: ivybridge: Update microcode early in boot	Simon Glass	2015-01-13	-0/+16
\| \| \| \| \| \| \| \| \| \| \|	At present the normal update (which happens much later) does not work. This seems to have something to do with the 'no eviction' mode in the CAR, or at least moving the microcode update after that causes it not to work. For now, do an update early on so that it definitely works. Also refuse to continue unless the microcode update check (later in boot) is successful. Signed-off-by: Simon Glass <sjg@chromium.org>
*	x86: ivybridge: Add a way to turn off the CAR	Simon Glass	2015-01-13	-0/+46
\| \| \| \| \| \| \|	Cache-as-RAM should be turned off when we relocate since we want to run from RAM. Add a function to perform this task. Signed-off-by: Simon Glass <sjg@chromium.org>
*	x86: Add support for MTRRs	Simon Glass	2015-01-13	-6/+6
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use. Clean up the existing header file to follow style, and remove the unneeded code. These can speed up booting so should be supported. Add these to global_data so they can be requested while booting. We will apply the changes during relocation (in a later commit). Signed-off-by: Simon Glass <sjg@chromium.org>
*	x86: chromebook_link: Implement CAR support (cache as RAM)	Simon Glass	2014-11-21	-2/+160
\| \| \| \| \| \| \| \|	Add support for CAR so that we have memory to use prior to DRAM init. On link there is a total of 128KB of CAR available, although some is used for the memory reference code. Signed-off-by: Simon Glass <sjg@chromium.org>
*	x86: Add chromebook_link board	Simon Glass	2014-11-21	-0/+20
	This board is a 'bare' version of the existing 'link 'board. It does not require coreboot to run, but is intended to start directly from the reset vector. This initial commit has place holders for a wide range of features. These will be added in follow-on patches and series. So far it cannot be booted as there is no ROM image produced, but it does build without errors. Signed-off-by: Simon Glass <sjg@chromium.org>