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path: root/arch/x86/cpu/coreboot/timestamp.c
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* x86: coreboot: Set up timer base correctlyBin Meng2015-01-13-13/+20
| | | | | | | | | | | | | | If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Support adding coreboot timestanps to bootstageSimon Glass2013-05-13-0/+38
| | | | | | | Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add TSC timerSimon Glass2013-05-13-1/+3
| | | | | | | | | | | | | | This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Enable coreboot timestamp facility support in u-boot.Vadim Bendebury2012-12-06-0/+61
This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>