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* powerpc: ppc4xx: remove korat board supportMasahiro Yamada2015-03-17-4/+0
| | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Larry Johnson <lrj@acm.org>
* powerpc: mpc5xxx: remove galaxy5200 board supportMasahiro Yamada2015-03-17-4/+0
| | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Eric Millbrandt <emillbrandt@dekaresearch.com>
* powerpc: ppc4xx: remove W7OLMC/W7OLMG board supportMasahiro Yamada2015-03-17-7/+0
| | | | | | | | They have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Erik Theisen <etheisen@mindspring.com>
* powerpc: mpc5xxx: remove aev, TB5200 board supportMasahiro Yamada2015-03-17-6/+0
| | | | | | | They have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* powerpc: ppc4xx: remove JSE board supportMasahiro Yamada2015-03-17-4/+0
| | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stephen Williams <steve@icarus.com>
* powerpc: mpc5xxx: remove BC3450 board supportMasahiro Yamada2015-03-17-4/+0
| | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* SECURE_BOOT : enable esbc_validate command for powerpc and arm platforms.gaurav rana2015-03-05-1/+41
| | | | | | | | | | esbc_validate command uses various IP Blocks: Security Monitor, CAAM block and SFP registers. Hence the respective CONFIG's are enabled. Apart from these CONFIG_SHA_PROG_HW_ACCEL and CONFIG_RSA are also enabled. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* fsl_sfp : Move ccsr_sfp_regs definition to common includegaurav rana2015-03-05-15/+2
| | | | | | | | | | | Freescale sfp has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the CCSR defintion of sfp_regs to common include. This patch also defines ccsr_sfp_regs definition for newer versions of SFP. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc: 85xx: Modify CONFIG_USB_MAX_CONTROLLER_COUNT for P1022DSYing Zhang2015-03-04-2/+2
| | | | | | | | | | | Modify CONFIG_USB_MAX_CONTROLLER_COUNT value to 1 on P1022DS. As ETSEC2 and USB2 are muxed; thus if ETSEC2 is enabled, the system bus hangs on USB2 if ETSEC2 is enabled but "usb start" command is issued. Hence making default controller count to 1 to avoid system hang. Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: Yusong Sun <yorksun@freescale.com>
* powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCsShaveta Leekha2015-03-04-3/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code provides framework for heterogeneous multicore chips based on StarCore and Power Architecture which are chasis-2 compliant, like B4860 and B4420 It will make u-boot recognize all non-ppc cores and peripherals like SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs. Example boot logs of B4860QDS: U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45) CPU0: B4860E, Version: 2.2, (0x86880022) Core: e6500, Version: 2.0, (0x80400120) Clock Configuration: CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz, DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz, DSP CPU4:1200 MHz, DSP CPU5:1200 MHz, CCB:666.667 MHz, DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz CPRI:600 MHz MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz FMAN1: 666.667 MHz QMAN: 333.333 MHz Top level changes include: (1) Top level CONFIG to identify HETEROGENUOUS clusters (2) CONFIGS for SC3900/DSP components (3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO" updated for dsp cores and other components (3) APIs to get DSP num cores and their Mask like: cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC (5) Code to fetch and print SC cores and other heterogenous device's frequencies (6) README added for the same Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* common/board_f: factor out reserve_stacksAndreas Bießmann2015-02-17-0/+32
| | | | | | | | Introduce arch_reserve_stacks() to tailor gd->start_addr_sp and gd->irq_sp to the architecture needs. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: Add defaults for DT based booting to really workStefan Roese2015-02-12-0/+9
| | | | | | | | | | | | | These additional nodes need to be provided to get U-Boot to boot correctly on the Canyonlands / Glacier board: - chosen path to the console-uart - reg-shift set to 0 in the uart device nodes Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: Add linkage.h fileSimon Glass2015-02-12-0/+7
| | | | | | This permits us to use linux/linkage.h on PowerPC machines. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: amcc: Omit unneeded ns16550 CONFIG if using driver modelSimon Glass2015-02-12-0/+2
| | | | | | This comes from the device tree or a call to get_uart_clock(). Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: Allow the end of u-boot.bin to be foundSimon Glass2015-02-12-2/+6
| | | | | | | | Define an _end symbol indicating the end of u-boot.bin. Also add some dummy words into the link script to ensure that u-boot.bin will always extend that far. There may be a better way of doing this. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: Add a gpio.h header fileSimon Glass2015-02-12-0/+7
| | | | | | | This is required at present for device tree control. The ppc4xx does support GPIOs but does not seem to have a proper driver. So this file is empty. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: Call board_init_f_mem() for generic boardSimon Glass2015-02-12-1/+17
| | | | | | Call this function to set up our early memory. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: dts: Bring in canyonlands device tree filesSimon Glass2015-02-12-0/+1484
| | | | | | | The canyonlands.h config file works with canyonlands, glacier and arches boards. Bring in the device tree files for these from Linux 3.17. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: canyonlands: Move to generic boardSimon Glass2015-02-12-0/+2
| | | | | | Switch to generic board so that this board will not be broken/removed. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: Add ramboot config for glacierSimon Glass2015-02-12-0/+8
| | | | | | | Add a new ramboot config for glacier so that it is possible to test U-Boot loaded over Ethernet instead of using JTAG. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: canyonlands: config: Tidy up CONFIGs and config.mkSimon Glass2015-02-12-4/+1
| | | | | | | | Many CONFIG options have an unnecessary value of 1. CONFIG_440 is set in the various board config files. Also simplify the CONFIG_440 check in config.mk Signed-off-by: Simon Glass <sjg@chromium.org>
* crypto/fsl: Add fixup for crypto nodeRuchika Gupta2015-01-23-170/+1
| | | | | | | | | | | Era property is added in the crypto node in device tree. Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to drivers/sec/sec.c so that it can be used across arm and powerpc platforms having crypto node. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> [York Sun: Fix commit message indentation] Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc: remove icecube_5200, Lite5200, cpci5200, mecp5200, pf5200Masahiro Yamada2015-01-23-30/+0
| | | | | | | | These boards are still non-generic boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* powerpc: mpc5xxx: PM520 board supportMasahiro Yamada2015-01-23-4/+0
| | | | | | | This board is still a non-generic board. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Josef Wagner <Wagner@Microsys.de>
* powerpc: mpc5xxx: remove Total5200 board supportMasahiro Yamada2015-01-23-4/+0
| | | | | | This board is still a non-generic board. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: ppc4xx: remove PPChameleonEVB, CATcenter boardsMasahiro Yamada2015-01-23-7/+0
| | | | | | | | | | | These boards are still non-generic boards. It is a good thing that we can drop board-specific hack code from drivers/mtd/nand/nand_base.c Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
* powerpc: mpc85xx: remove P2020DS board supportMasahiro Yamada2015-01-23-4/+0
| | | | | | This board is still a non-generic board. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: mpc85xx: remove P2020COME board supportMasahiro Yamada2015-01-23-4/+0
| | | | | | | This board is still a non-generic board. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Ira W. Snyder <iws@ovro.caltech.edu>
* powerpc: mpc85xx: remove P1_P2_RDB boardsMasahiro Yamada2015-01-23-6/+0
| | | | | | | | These boards are still non-generic boards: P1011RDB, P1022RDB, P2010RDB, P2020RDB Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
* powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS supportMasahiro Yamada2015-01-23-8/+0
| | | | | | | | These boards are still non-generic boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Dave Liu <daveliu@freescale.com> Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
* arch/powerpc: Initialize VSC9953 L2 SwitchCodrin Ciubotariu2015-01-21-0/+5
| | | | | | | This patch initializes VSC9953 L2 Switch for boards that have CONFIG_VSC9953 defined in their config file. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
* arch/powerpc: Add SGMII support for the L2 Switch portsCodrin Ciubotariu2015-01-16-4/+16
| | | | | | | | | Some Freescale SoCs like T1020 and T1040 have an integrated L2 Switch. The L2 Switch ports may be connected to Ethernet PHYs over SGMII and QSGMII. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arch/powerpc: Fix mapping of Freescale SerDes protocolsCodrin Ciubotariu2015-01-16-30/+38
| | | | | | | | | | | | | | | | The number of supported serdes protocols on Freescale SoCs has increased over time. Until now, an u64 variable have been initialized on boot with the configured protocols. However, since this number has increased (enum srds_prtcl has more than 64 values), 64 bits are no longer sufficient to hold track of all the configured protocols. This patch replaces the u64 map values with static arrays. To keep track of the number of serdes protocols, the SERDES_PRCTL_COUNT vale has been added at the end of enum srds_prtcl. This value must always be the last one. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* mpc85xx: clean up the old deep sleep frameworktang yuantian2015-01-16-30/+1
| | | | | | | | | All the boards that support deep sleep feature are converted to deep sleep generic board interface. The old interface which support non-generic board is not used anymore. So clean it up. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/t1024: add serdes protocol 0x40 and 0x5fShengzhou Liu2015-01-16-0/+2
| | | | | | | Add serdes protocol 0x40 and 0x5f. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/mpc85xx: Define PBI Flash Base for C29XPCIE Secure BootAneesh Bansal2015-01-16-0/+2
| | | | | | | CONFIG_SYS_PBI_FLASH_BASE is defined for Secure Boot on C29X Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* b4860: Correct LIODN assignment for PCIeTudor Laurentiu2015-01-16-1/+1
| | | | | | | | | | | For B4 the LIODN register for PCIe is in PCIe address space and not in GUTs Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc: mpc85xx: Add dummy gpio.h to enable CONFIG_OF_CONTROLRuchika Gupta2015-01-16-0/+15
| | | | | | | | | | | | | | | | | | | | If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled. It includes <asm/gpio.h> and then <asm/gpio.h> includes <asm/arch/gpio.h>. As a result, all the SoCs that enable CONFIG_OF_CONTROL must have <asm/arch/gpio.h>. The right fix would be to split the lib/fdtdec.c to remove dependency on GPIO. This commit adds a dummy <asm/arch/gpio.h> to support OF_CONTROL for mpc85xx platform. A file mpc85xx_gpio.h exists in arch/powerpc/include/asm. The defintions in that file conflict with the ones in asm-generic/gpio.h. Hence a dummy header file has been added. This will be removed after FDT-GPIO stuff is fixed correctly. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc: 74xx_7xx: remove 74xx_7xx cpu supportMasahiro Yamada2015-01-16-2362/+0
| | | | | | | | | | | | | All the 74xx_7xx boards are still non-generic boards: P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2 Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefan Roese <sr@denx.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Nye Liu <nyet@zumanetworks.com> Cc: Roy Zang <tie-fei.zang@freescale.com>
* mpc8xx: remove unused linker scriptMasahiro Yamada2015-01-16-82/+0
| | | | | | | | | | Now TQM8xx is the only remaining board family of mpc8xx. It uses its own linker script, board/tqc/tqm8xx/u-boot.lds. arch/powerpc/cpu/mpc8xx/u-boot.lds is not used by any boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de>
* ppc4xx: remove dead codeMasahiro Yamada2015-01-16-4/+0
| | | | | | | | | | | | Since commit 843125daebd7 (ppc4xx: remove HH405 board), CONFIG_HH405 is not defined. Since commit d52633047913 (ppc4xx: remove PMC405), CONFIG_PMC405 is not defined. Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove some CPCI405 variantsMatthias Fuchs2015-01-13-9/+0
| | | | | | only keep CPCI4052 Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove G2000 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove WUH405 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove VOH405 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove PMC405 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove PCI405 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove OCRTC boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove HUB405 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: remove HH405 boardMatthias Fuchs2015-01-13-4/+0
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
generated by cgit v1.1 at 2024-11-08 17:59:23 +0000