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* Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk2010-10-26-2/+15
| | | | | | | | | | | | | | | | | | CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZEWolfgang Denk2010-10-26-17/+17
| | | | | | | | | | | | | | | | | | CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be some end address; to make the meaning more clear we rename it into CONFIG_SYS_INIT_RAM_SIZE No other code changes are performed in this patch, only minor editing of white space (due to the changed length) and the comments was done, where noticed. Note that the code for the PATI and cmi_mpc5xx board configurations looks seriously broken. Last known maintainers on Cc: Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Denis Peter <d.peter@mpl.ch> Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* MPC8315ERD: fix build errorWolfgang Denk2010-10-24-1/+1
| | | | | | | | | | | | | | | | | Commit 29c6fbe "MPC5121: Add USB EHCI support" renamed CONFIG_SYS_MPC8xxx_USB_ADDR into CONFIG_SYS_FSL_USB_ADDR but missed to update arch/powerpc/cpu/mpc83xx/cpu_init.c, resulting in: cpu_init.c: In function 'cpu_init_f': cpu_init.c:332: error: 'CONFIG_SYS_MPC8xxx_USB_ADDR' undeclared (first use in this function) cpu_init.c:332: error: (Each undeclared identifier is reported only once cpu_init.c:332: error: for each function it appears in.) make[1]: *** [/work/wd/tmp-ppc/arch/powerpc/cpu/mpc83xx/cpu_init.o] Error 1 Fix this. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
* ppc: Don't initialize write protected NOR flashesJohn Schmoller2010-10-20-1/+15
| | | | | | | | | | | | If a NOR flash is write protected it can not be initialized/detected so add the ability for boards to skip NOR initialization on bootup. A board can skip NOR initialization by implementing the board_flash_wp_on() function. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: sr@denx.de Acked-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-10-20-21/+5
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| * ppc4xx: Change tsr/tcr macros to upper caseStefan Roese2010-10-20-21/+5
| | | | | | | | | | | | Remove uneccessary functions to access the TCR/TSR registers as well. Signed-off-by: Stefan Roese <sr@denx.de>
* | 85xx: Use gc-sections to reduce image sizePeter Tyser2010-10-20-42/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On an XPedite5370 over 11KBytes were saved: Before: text data bss dec hex filename 332456 33364 33476 399296 617c0 ./u-boot After: text data bss dec hex filename 321075 33836 33476 388387 5ed23 ./u-boot Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 86xx: Use gc-sections to reduce image sizePeter Tyser2010-10-20-18/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On an XPedite5170 over 11KBytes were saved: Before: text data bss dec hex filename 319488 28700 33204 381392 5d1d0 ./u-boot After: text data bss dec hex filename 307663 29144 33204 370011 5a55b ./u-boot Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 86xx: Create common linker scriptKumar Gala2010-10-20-0/+135
| | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8640: Update the io_sel fields for PCI ExpressPeter Tyser2010-10-20-1/+4
| | | | | | | | | | | | | | | | Previously io_sel=0xe incorrect stated PCIE1 was enabled. Also add support for the mpc8640's PCIE2 interface. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx: Add support for not releasing secondary cores via 'mp_holdoff'Aaron Sierra2010-10-20-3/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | Some OSes require that secondary cores not be initialized when they are booted (eg VxWorks). By default when U-Boot is compiled with the CONFIG_MP option all secondary cores are brought out of reset and held in spinloops. Setting the "mp_holdoff" environment variable to 'yes' or '1' will cause U-Boot to leave secondary cores in their default state. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Disable unused chip-select for DDR controller interleavingYork Sun2010-10-20-3/+14
| | | | | | | | | | | | | | | | When DDR controller interleaving is eabled and less than all bank (chip-select) interleaving is seletected, the unused chip-select should be disabled. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Adding fixed sdram setting for cornet_ds boardYork Sun2010-10-20-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram setting. SPD based parameters and fixed parameters can be toggled by hwconfig. To use fixed parameters, hwconfig=fsl_ddr:sdram=fixed To use SPD parameters, hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Add memory test feature for mpc85xx POST.York Sun2010-10-20-0/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory test is performed after DDR initialization when U-boot stills runs in flash and cache. On recent mpc85xx platforms, the total memory can be more than 2GB. To cover whole memory, it needs be mapped 2GB at a time using a sliding TLB window. After the testing, DDR is remapped with up to 2GB memory from the lowest address as normal. If memory test fails, DDR DIMM SPD and DDR controller registers are dumped for further debugging. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Adding more control to physical address mappingYork Sun2010-10-20-6/+10
| | | | | | | | | | | | | | | | A worker function setup_ddr_tlbs_phys() is introduced to implement more control on physical address mapping. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/8xxx: Add fdt_fixup_phy_connection helperKumar Gala2010-10-20-0/+26
| | | | | | | | | | | | | | Add a common helper that will set the PHY connection type based on enum. We use this on eTSEC, UCC, and will with Fman in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/fsl: Introduce common enum for PHY typesKumar Gala2010-10-20-0/+31
|/ | | | | | | | Have a common enum for phy types that we use in the UCC driver. We will also use this enum for dealing with phy connection fixup in the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* boot: change some arch ifdefs to feature ifdefsJohn Rigby2010-10-18-0/+3
| | | | | | | | | | | | | | | | | The routines boot_ramdisk_high, boot_get_cmdline and boot_get_kbd are currently enabled by various combinations of CONFIG_M68K, CONFIG_POWERPC and CONFIG_SPARC. Use CONFIG_SYS_BOOT_<FEATURE> defines instead. CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_BOOT_GET_CMDLINE CONFIG_SYS_BOOT_GET_KBD Define these as appropriate in arch/include/asm/config.h files. Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc: do not fixup NULL ptrsJoakim Tjernlund2010-10-18-12/+36
| | | | | | | | | | | | | | The fixup routine must not fixup NULL pointers. Problem can be seen by char *testfun(void) __attribute__((weak)); char *(*myfun)(void) = testfun; Then add printf("myfun:%p, &myfun:%p\n", myfun, &myfun); before relocation and after relocation. myfun should be NULL in both cases but it is not. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* powerpc: Cleanup BOOTFLAG_* referencesPeter Tyser2010-10-18-3/+11
| | | | | | | | | | | | Now that warm booting is not supported, there isn't a need for the BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them. Note that this change makes the board info bd_bootflags field useless. It will always be set to 0, but we leave it around so that we don't break the board info structure that some OSes are expecting to be passed from U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* MPC5121: Add USB EHCI supportDamien Dusha2010-10-18-0/+4
| | | | | | | | | | Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com> Signed-off-by: Damien Dusha <d.dusha@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Coding style cleanup; slight file restructuring. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-18-12/+12
| | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc: Conditionally compile bat_rw.cPeter Tyser2010-10-13-1/+1
| | | | | | | Only a few PPC boards actually use the common BAT manipulation functions, so only compile it for them. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* powerpc: Remove warm reset entry pointPeter Tyser2010-10-12-137/+25
| | | | | | No boards utilize the warm reset entry point, so remove it. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* powerpc: Zero out board info struct on bootupPeter Tyser2010-10-12-16/+1
| | | | | | | This puts the board info struct in a known state and allows the removal of other code which initialized board info fields to 0. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-10-11-5/+14
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| * powerpc/85xx: fix rev.2 job queue LIODN error stormKim Phillips2010-10-07-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pumping line-rate traffic though a p4080 rev.2, which is configured to encrypt packets prior to forwarding through an IPsec tunnel, gets this error: of_platform ffe302000.jq: DECO: desc idx 22: LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the "shared from" DECO's Descriptor required that the SEQ LIODNs be the same and they aren't. Since high traffic rates cause DECOs to begin to start sharing shared descriptors amongst themselves, and DECOs inherit job queue LIODNs when accessing shared descriptors, and a recently discovered rev.2 h/w erratum requires all sharing job queues in a partition have same liodn assignment, reassign the first job queue's liodn assignment to the rest. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p4080: Add new CPC register - HDBCR0Kumar Gala2010-10-07-1/+4
| | | | | | | | | | | | Manual was updated to add a new register for disabling CDQ speculation. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | PowerPC: change board specific early pci_init() into generic.Andre Schwarz2010-10-06-5/+4
| | | | | | | | Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
* | PCU_E: remove code for yet another corpseWolfgang Denk2010-10-06-3/+2
|/ | | | | | | The PCU_E board has long reached EOL, and support for it is no longer relevant in current versions of U-Boot. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-10-05-36/+204
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| * ppc4xx: Remove some testing hacks from ppc4xx.hStefan Roese2010-10-04-17/+0
| | | | | | | | | | | | | | I accidentally left these hacks in the code while doing the big header cleanup. Let's remove it now. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add defines for COM3 & COM4 (UART2 & UART3) on 440EPx/GRxStefan Roese2010-10-04-0/+2
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * APM821xx: Add CPU supportTirumala Marri2010-10-04-19/+202
| | | | | | | | | | | | | | | | | | APM821XX is a new line of SoCs which are derivatives of PPC44X family of processors. This patch adds support of CPU, cache, tlb, 32k ocm, bootstraps, PLB and AHB bus. Signed-off-by: Tirumala R Marri <tmarri@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk2010-10-05-55/+7
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| * fsl_diu_fb: further refactoring of FSL DIU codeAnatolij Gustschin2010-09-25-55/+7
| | | | | | | | | | | | | | | | Move common code to the fsl_diu_fb.c file and remove obsolete code from board files (aria, mpc8610hpcd and pdm360ng). Move fsl_diu_fb.h file to the include directory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk2010-09-28-952/+3800
|\ \ | |/ | | | | | | | | | | Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-23-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: fix pcie build warningKim Phillips2010-09-23-1/+1
| | | | | | | | | | | | | | | | Configuring for MPC8308RDB board... pcie.c: In function 'mpc83xx_pcie_register_hose': pcie.c:143: warning: assignment makes pointer from integer without a cast Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: add support for setting PCIE clocksIlya Yanok2010-09-23-0/+12
| | | | | | | | | | | | | | | | This patch adds support for setting PCIE clocks in cpu_init.c by providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx/pcie: make it compile with PCIE2 unconfiguredIlya Yanok2010-09-23-13/+25
| | | | | | | | | | | | | | | | MPC8308 has only one PCIE host controller so we want it to compile without CONFIG_SYS_PCIE2_CFG_{BASE,SIZE} defined. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * ppc4xx: Disable trace broadcast for 44x non debug modeVictor Gallardo2010-09-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default the trace broadcast is enabled on 44x systems. To reduce power consumption when instruction tracing is not needed, disable trace broadcast. Check External Debug Mode (EDM) bit to detect if it should be disabled or not. Resetting system via a debugger will set the DBCR0[EDM] bit. Resetting via u-boot or OS will not. Signed-off-by: Victor Gallardo <vgallardo@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Cleanup of PVR detection code in cpu.cStefan Roese2010-09-23-71/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans the PVR detection code in check_cpu() up a bit. Basically the strings are better seperated, resulting in an easier to understand and maintain code version. The #ifdef's couldn't be removed easily because of two reasons: - Some SoC revisions have the same PVR, so need a way to differentiate between those two SoC's. - In some case statements registers only available in this SoC variant are referenced. Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't add this 440 detection code and vice versa. Resulting in this U-Boot image size change: 405EX (Kilauea): 408 bytes less 440EPx (Sequoia): 604 bytes less 460EX (Canyonlands): 564 bytes less Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * Remove unused CONFIG_SERIAL_SOFTWARE_FIFO featureStefan Roese2010-09-23-7/+0
| | | | | | | | | | | | | | | | | | This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
| * ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-716/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-845/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-1934/+1722
| | | | | | | | | | | | | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specificStefan Roese2010-09-23-2/+2
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-28/+3861
| | | | | | | | | | | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
| * fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo ↵Timur Tabi2010-09-21-66/+3
| | | | | | | | | | | | | | | | | | | | features The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur@freescale.com>
generated by cgit v1.1 at 2024-12-24 22:33:26 +0000