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* powerpc/bootm: Flush ramdisk and device tree image when booting on MPKumar Gala2011-12-12-6/+16
| | | | | | | | | | | | | We already flush the kernel image after we've loaded it to ensure visiblity to the other cores. We need to do the same thing for the ramdisk and device tree images. In AMP boot scenarios we might not be HW cache coherent with the secondary core that we are loading and setting the ramdisk and device tree up for. Thus we need to ensure we've flushed the regions of memory utilized by ramdisk and device tree so the loadding and any modifications (from decompression or fdt updates) are made visible to the secondary cores. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Minimal private libgcc to build on DebianKyle Moffett2011-12-07-1/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Standard Debian powerpc and powerpcspe systems only include hard-float libgcc in their native compilers, which causes scary build warnings when building U-Boot. Debian and other PowerPC-supporting distributions used to provide libgcc and other libraries in a "nof" (soft-float) form in the "multilib" packages. As they were completely unused by the distribution and therefore tended to be very buggy it was decided to save some time on the part of the maintainers and build-servers by removing them. Admittedly, right now the linker warnings do not indicate any problems, as the included routines do not use any floating point at all. The concern is that if floating-point code were ever added it might cause hard-float code to be unexpectedly included in U-Boot without generating a hard error. This would cause unexplained crashes or indeterminate results at runtime. The easiest way to resolve this is to borrow the routines that U-Boot needs from the Linux kernel, which has the same issue. Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3(). They were borrowed from arch/powerpc/kernel/misc_32.S as of v2.6.38-rc5, commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, and are GPLv2+. The Makefile framework was copied from the U-Boot ARM port. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-12-07-6/+3
|\ | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/83xx: fix sdram initialization for keymile boards powerpc/mpc83xx: cleanup makefile for mpc83xx
| * powerpc/mpc83xx: cleanup makefile for mpc83xxYork Sun2011-11-11-6/+3
| | | | | | | | | | | | | | | | Remove symbolic link generated by compiling. Fix makefile for out-of-tree compiling error. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | ppc4xx: Remove usbdev.cStefan Roese2011-12-07-274/+0
| | | | | | | | | | | | | | As this "driver" doesn't seem to be really used, let's remove it completely. Signed-off-by: Stefan Roese <sr@denx.de>
* | arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warningWolfgang Denk2011-12-02-3/+0
| | | | | | | | | | | | | | | | | | | | | | Fix: cpu.c: In function 'checkcpu': cpu.c:51:7: warning: variable 'ver' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc85xx: support for Freescale COM Express P2020Ira W. Snyder2011-11-29-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Freescale COM Express P2020 board. This board is similar to the P1_P2_RDB, but has some extra (as well as missing) peripherals. Unlike all other mpc85xx boards, it uses a watchdog timeout to reset. Using the HRESET_REQ register does not work. This board has no NOR flash, and can only be booted via SD or SPI. This procedure is documented in Freescale Document Number AN3659 "Booting from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated Processor Reference Manual" (section 4.5). Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warningKumar Gala2011-11-29-2/+1
| | | | | | | | | | | | | | | | | | Fix: interactive.c: In function 'fsl_ddr_interactive': interactive.c:1357:15: warning: variable 'len' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc85xx: support board-specific reset functionIra W. Snyder2011-11-29-1/+16
| | | | | | | | | | | | | | | | | | This is useful for boards which cannot be reset in the usual way for the 85xx CPU. An example is a board which can only be reset by a hardware watchdog. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: verify the localbus device tree address before booting the OSTimur Tabi2011-11-29-9/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The localbus controller node in the device tree is typically a root node, even though the controller is part of CCSR. If we were to put the lbc node under the SOC node, then the 'ranges' property in the lbc node would translate through the 'ranges' property of the parent SOC node, and we don't want that. Since the lbc is a separate node, it's possible for the 'reg' property to be wrong. This happened with the original version of p1022ds.dts, which used a 32-bit value in the 'reg' address, instead of a 36-bit address. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8xxx: update module_type values from JEDEC DDR3 SPD SpecificationIra W. Snyder2011-11-29-0/+7
| | | | | | | | | | | | | | | | | | | | Newer JEDEC DDR3 SPD Specifications define several additional values for the DDR3 module_type field which were undefined when this code was written. Update the code to handle the newer module types. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: clean up and document the QE/FMAN microcode macrosTimur Tabi2011-11-29-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several macros are used to identify and locate the microcode binary image that U-boot needs to upload to the QE or Fman. Both the QE and the Fman use the QE Firmware binary format to package their respective microcode data, which is why the same macros are used for both. A given SOC will only have a QE or an Fman, so this is safe. Unfortunately, the current macro definition and usage has inconsistencies. For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address of NAND. There's no way to know by looking at a variable how it's supposed to be used. In the future, the code which uploads QE firmware and Fman firmware will be merged. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: always implement the work-around for Erratum SATA_A001Timur Tabi2011-11-29-4/+33
| | | | | | | | | | | | | | | | | | | | On the P1022/P1013, the work-around for erratum SATA_A001 was implemented only if U-Boot initializes SATA, but SATA is not initialized by default. So move the work-around to the CPU initialization function, so that it's always executed on the SOCs that need it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.hTimur Tabi2011-11-29-0/+6
| | | | | | | | | | | | | | | | | | | | | | Macro CONFIG_FSL_SATA_V2 is defined if the SOC has a V2 Freescale SATA controller, so it should be defined in config_mpc85xx.h instead of the various board header files. So now CONFIG_FSL_SATA_V2 is always defined on the P1013, P1022, P2041, P3041, P5010, and P5020. It was already defined for the P1010 and P1014. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add workaround for erratum A-003474York Sun2011-11-29-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Erratum A-003474: Internal DDR calibration circuit is not supported Impact: Experience shows no significant benefit to device operation with auto-calibration enabled versus it disabled. To ensure consistent timing results, Freescale recommends this feature be disabled in future customer products. There should be no impact to parts that are already operating in the field. Workaround: Prior to setting DDR_SDRAM_CFG[MEM_EN]=1, do the following: 1. Write a value of 0x0000_0015 to the register at offset CCSRBAR + DDR OFFSET + 0xf30 2. Write a value of 0x2400_0000 to the register at offset CCSRBAR + DDR OFFSET + 0xf54 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: fixup flexcan device tree clock-frequencyJia Hongtao2011-11-29-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the fixup matchable with dts and kernel. Update the compatible from "fsl,flexcan-v1.0" to "fsl,p1010-flexcan" and Change the "clock-freq" property to "clock-frequency". We also change flexcan frequency from CCB-clock to CCB-clock/2 according to P1010 spec. We now keep the old interfaces to make previous kernel work. They should be removed in the future. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add workaround for erratum CPU-A003999Kumar Gala2011-11-29-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Erratum A-003999: Running Floating Point instructions requires special initialization. Impact: Floating point arithmetic operations may result in an incorrect value. Workaround: Perform a read modify write to set bit 7 to a 1 in SPR 977 before executing any floating point arithmetic operation. This bit can be set when setting MSR[FP], and can be cleared when clearing MSR[FP]. Alternatively, the bit can be set once at boot time, and never cleared. There will be no performance degradation due to setting this bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc83xx: spd_sdram - fix gcc 4.6 compiler warningKim Phillips2011-11-16-2/+1
| | | | | | | | | | | | | | | | Configuring for sbc8349 board... spd_sdram.c: In function 'spd_sdram': spd_sdram.c:152:41: warning: variable 'trfc_high' set but not used [-Wunused-but-set-variable] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | iop480_uart.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-2/+1
| | | | | | | | | | | | | | | | Fix: iop480_uart.c: In function 'serial_init': iop480_uart.c:137:16: warning: variable 'val' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | 40x_spd_sdram.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-10/+10
| | | | | | | | | | | | | | | | | | | | Fix: 40x_spd_sdram.c: In function 'spd_sdram': 40x_spd_sdram.c:137:6: warning: variable 'sdram0_b3cr' set but not used [-Wunused-but-set-variable] 40x_spd_sdram.c:136:6: warning: variable 'sdram0_b2cr' set but not used [-Wunused-but-set-variable] 40x_spd_sdram.c:129:6: warning: variable 'sdram0_ecccfg' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | 44x_spd_ddr2.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-31/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 44x_spd_ddr2.c: In function 'initdram': 44x_spd_ddr2.c:450:17: warning: variable 'dimm_spd' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c: In function 'program_copt1': 44x_spd_ddr2.c:1003:16: warning: variable 'ddrtype' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c: In function 'DQS_calibration_process': 44x_spd_ddr2.c:2498:7: warning: variable 'window_found' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c:2497:16: warning: variable 'end_rffd' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c:2496:16: warning: variable 'end_rqfd' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c:2495:16: warning: variable 'begin_rffd' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c:2494:16: warning: variable 'begin_rqfd' set but not used [-Wunused-but-set-variable] 44x_spd_ddr2.c:2493:7: warning: variable 'min_end' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | 44x_spd_ddr.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-4/+0
| | | | | | | | | | | | | | | | | | Fix: 44x_spd_ddr.c: In function 'program_cfg0': 44x_spd_ddr.c:384:16: warning: variable 'dimm_64bit' set but not used [-Wunused-but-set-variable] 44x_spd_ddr.c:383:16: warning: variable 'dimm_32bit' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | cmd_ecctest.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-6/+3
| | | | | | | | | | | | | | | | | | | | Fix: cmd_ecctest.c: In function 'inject_ecc_error': cmd_ecctest.c:116:6: warning: variable 'val' set but not used [-Wunused-but-set-variable] cmd_ecctest.c: In function 'rewrite_ecc_parity': cmd_ecctest.c:154:6: warning: variable 'val' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | 4xx_ibm_ddr2_autocalib.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-6/+9
| | | | | | | | | | | | | | | | | | | | Fix: 4xx_ibm_ddr2_autocalib.c: In function 'get_membase': 4xx_ibm_ddr2_autocalib.c:157:8: warning: variable 'bxcf' set but not used [-Wunused-but-set-variable] 4xx_ibm_ddr2_autocalib.c: In function 'DQS_calibration_methodB': 4xx_ibm_ddr2_autocalib.c:722:8: warning: variable 'rffd' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | 4xx_pcie.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix: 4xx_pcie.c: In function 'pcie_read_config': 4xx_pcie.c:230:6: warning: variable 'address' set but not used [-Wunused-but-set-variable] 4xx_pcie.c: In function 'pcie_write_config': 4xx_pcie.c:290:6: warning: variable 'address' set but not used [-Wunused-but-set-variable] 4xx_pcie.c: In function 'ppc4xx_setup_pcie_rootpoint': 4xx_pcie.c:1066:17: warning: variable 'rmbase' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | usb_ohci.c: Fix GCC 4.6 build warningsStefan Roese2011-11-16-2/+1
| | | | | | | | | | | | | | | | Fix: usb_ohci.c: In function 'dl_transfer_length': usb_ohci.c:756:8: warning: variable 'tdINFO' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefan Roese <sr@denx.de>
* | arch/powerpc/cpu/mpc512x/i2c.c: Fix GCC 4.6 warningsAnatolij Gustschin2011-11-16-2/+1
| | | | | | | | | | | | | | | | | | Fix: i2c.c: In function 'wait_for_bb': i2c.c:81:16: warning: variable 'temp' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | arch/powerpc/cpu/mpc512x/pci.c: Fix GCC 4.6 warningsAnatolij Gustschin2011-11-16-2/+0
| | | | | | | | | | | | | | | | | | Fix: pci.c: In function 'pci_init_board': pci.c:55:26: warning: variable 'pci_conf' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2011-11-16-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-video: api: export LCD device to external apps font: split font data from video_font.h tools: logo: split bmp arrays from bmp_logo.h lcd: add clear and draw bitmap declaration VIDEO: mx3fb: GCC4.6 fix build warnings Powerpc/DIU: Fixed the 800x600 and 1024x768 resolution bug
| * | font: split font data from video_font.hChe-Liang Chiou2011-11-15-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | While video_font.h is useful even without referencing the font data, it is not possible to be included multiple times because it defines font data array right in the header. This patch splits the font data array into video_font_data.h and so now video_font.h can be included multiple times. This at least solves the code duplication in board/mcc200/lcd.c. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix: ctrl_regs.c: In function 'set_ddr_sdram_cfg_2': ctrl_regs.c:641:15: warning: variable 'rcw_en' set but not used [-Wunused-but-set-variable] ctrl_regs.c: In function 'compute_fsl_memctl_config_regs': ctrl_regs.c:951:31: warning: array subscript is above array bounds [-Warray-bounds] ctrl_regs.c:752:34: warning: array subscript is above array bounds [-Warray-bounds] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-1/+6
| | | | | | | | | | | | | | | | | | | | Fix: fsl_corenet_serdes.c: In function 'fsl_serdes_init': fsl_corenet_serdes.c:511:8: warning: variable 'buf' set but not used [-Wunused-but-set-variable] fsl_corenet_serdes.c:498:18: warning: variable 'lane_prtcl' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-0/+4
| | | | | | | | | | | | | | | | | | Fix: options.c: In function 'populate_memctl_options': options.c:486:28: warning: variable 'pdodt' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+2
| | | | | | | | | | | | | | | | | | Fix: fsl_lbc.c: In function 'upmconfig': fsl_lbc.c:110:9: warning: variable 'mdr' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-3/+2
| | | | | | | | | | | | | | | | | | Fix: tlb.c: In function 'disable_tlb': tlb.c:175:34: warning: variable '_mas7' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warningKumar Gala2011-11-11-2/+1
| | | | | | | | | | | | | | | | | | Fix: cpu_init.c: In function 'cpu_init_r': cpu_init.c:320:7: warning: variable 'l2srbar' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399Poonam Aggrwal2011-11-08-2/+2
| | | | | | | | | | | | | | | | Wrong pointer was being used to copy code into L2SRAM. Also removed the unreferenced variable l2srbar. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add support for Book-E MMU Arch v2.0Kumar Gala2011-11-08-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | A few of the config registers changed definition between MMU v1.0 and MMUv2.0. The new e6500 core from Freescale implements v2.0 of the architecture. Specifically, how we determine the size of TLB entries we support in the variable size (or TLBCAM/TLB1) array is specified in a new register (TLBnPS - TLB n Page size) instead of via TLBnCFG. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Fix warning for USB device-fixupRamneek Mehresh2011-11-08-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | Fix USB device-fixup warning "node not found". This was occuring because of static nature of start_offset variable Static start_offset was storing offset of last node modified, and was becoming issue if node fixup is carried multiple times, resulting in "node not found" warning Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: resize the boot page TLB before relocating CCSRTimur Tabi2011-11-08-0/+49
| | | | | | | | | | | | | | | | | | | | On some Freescale systems (e.g. those booted from the on-chip ROM), the TLB that covers the boot page can also cover CCSR, which breaks the CCSR relocation code. To fix this, we resize the boot page TLB so that it only covers the 4KB boot page. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: verify the current address of CCSR before relocating itTimur Tabi2011-11-08-0/+27
| | | | | | | | | | | | | | | | | | | | | | Verify that CCSR is actually located where it is supposed to be before we relocate it. This is useful in detecting U-Boot configurations that are broken (e.g. an incorrect value for CONFIG_SYS_CCSRBAR_DEFAULT). If the current value is wrong, we enter an infinite loop, which is handy for debuggers. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: add some missing sync instructions in the CCSR relocation codeTimur Tabi2011-11-08-0/+4
| | | | | | | | | | | | | | Calls to tlbwe and tlbsx should be preceded with an isync/msync pair. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: fix some comments in the CCSR relocation codeTimur Tabi2011-11-08-2/+2
| | | | | | | | | | Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: fix definition of MAS register macrosTimur Tabi2011-11-08-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Some of the MAS register macros do not protect the parameter with parentheses, which could cause wrong values if the parameter includes operators. Also fix the definition of TSIZE_TO_BYTES() so that it actually uses the parameter. This hasn't caused any problems to date because the parameter was always been 'tsize'. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129chenhui zhao2011-11-08-0/+5
|/ | | | | | | | | | Erratum NMG_eTSEC129 (eTSEC86 in MPC8548 document) applies to some early verion silicons. This workaround detects if the eTSEC Rx logic is properly initialized, and reinitialize the eTSEC Rx logic. Signed-off-by: Gong Chen <g.chen@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-6/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * mpc83xx: Cleanup usage of LBC constantsJoe Hershberger2011-11-03-1/+7
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of DDR constantsJoe Hershberger2011-11-03-0/+9
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Fix ipic structure definitionJoe Hershberger2011-11-03-4/+5
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Added siprr_{b,c} and sepcr for completeness. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: fix global timer structure definitionKim Phillips2011-11-03-1/+1
| | | | | | | | | | | | | | | | The byte address distance between GTCFR2 and GTMDR1 is 11, not 10. Reported-by: Shawn Bai <programassem@hotmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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