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* Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk2010-10-26-1/+1
| | | | | | | | | | | | | | | | | | CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Adding fixed sdram setting for cornet_ds boardYork Sun2010-10-20-0/+6
| | | | | | | | | | | | | | | 800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram setting. SPD based parameters and fixed parameters can be toggled by hwconfig. To use fixed parameters, hwconfig=fsl_ddr:sdram=fixed To use SPD parameters, hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Add fdt_fixup_phy_connection helperKumar Gala2010-10-20-0/+2
| | | | | | | Add a common helper that will set the PHY connection type based on enum. We use this on eTSEC, UCC, and will with Fman in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl: Introduce common enum for PHY typesKumar Gala2010-10-20-0/+31
| | | | | | | | Have a common enum for phy types that we use in the UCC driver. We will also use this enum for dealing with phy connection fixup in the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* boot: change some arch ifdefs to feature ifdefsJohn Rigby2010-10-18-0/+3
| | | | | | | | | | | | | | | | | The routines boot_ramdisk_high, boot_get_cmdline and boot_get_kbd are currently enabled by various combinations of CONFIG_M68K, CONFIG_POWERPC and CONFIG_SPARC. Use CONFIG_SYS_BOOT_<FEATURE> defines instead. CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_BOOT_GET_CMDLINE CONFIG_SYS_BOOT_GET_KBD Define these as appropriate in arch/include/asm/config.h files. Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc: Cleanup BOOTFLAG_* referencesPeter Tyser2010-10-18-1/+1
| | | | | | | | | | | | Now that warm booting is not supported, there isn't a need for the BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them. Note that this change makes the board info bd_bootflags field useless. It will always be set to 0, but we leave it around so that we don't break the board info structure that some OSes are expecting to be passed from U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* MPC5121: Add USB EHCI supportDamien Dusha2010-10-18-0/+4
| | | | | | | | | | Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com> Signed-off-by: Damien Dusha <d.dusha@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Coding style cleanup; slight file restructuring. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* powerpc/p4080: Add new CPC register - HDBCR0Kumar Gala2010-10-07-1/+4
| | | | | | Manual was updated to add a new register for disabling CDQ speculation. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc4xx: Remove some testing hacks from ppc4xx.hStefan Roese2010-10-04-17/+0
| | | | | | | I accidentally left these hacks in the code while doing the big header cleanup. Let's remove it now. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add defines for COM3 & COM4 (UART2 & UART3) on 440EPx/GRxStefan Roese2010-10-04-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* APM821xx: Add CPU supportTirumala Marri2010-10-04-12/+99
| | | | | | | | | APM821XX is a new line of SoCs which are derivatives of PPC44X family of processors. This patch adds support of CPU, cache, tlb, 32k ocm, bootstraps, PLB and AHB bus. Signed-off-by: Tirumala R Marri <tmarri@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-18/+119
| | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-841/+601
| | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-1903/+1689
| | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specificStefan Roese2010-09-23-0/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-1/+3834
| | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
* New implementation for internal handling of environment variables.Wolfgang Denk2010-09-19-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Motivation: * Old environment code used a pessimizing implementation: - variable lookup used linear search => slow - changed/added variables were added at the end, i. e. most frequently used variables had the slowest access times => slow - each setenv() would calculate the CRC32 checksum over the whole environment block => slow * "redundant" envrionment was locked down to two copies * No easy way to implement features like "reset to factory defaults", or to select one out of several pre-defined (previously saved) sets of environment settings ("profiles") * No easy way to import or export environment settings ====================================================================== API Changes: - Variable names starting with '#' are no longer allowed I didn't find any such variable names being used; it is highly recommended to follow standard conventions and start variable names with an alphanumeric character - "printenv" will now print a backslash at the end of all but the last lines of a multi-line variable value. Multi-line variables have never been formally defined, allthough there is no reason not to use them. Now we define rules how to deal with them, allowing for import and export. - Function forceenv() and the related code in saveenv() was removed. At the moment this is causing build problems for the only user of this code (schmoogie - which has no entry in MAINTAINERS); may be fixed later by implementing the "env set -f" feature. Inconsistencies: - "printenv" will '\\'-escape the '\n' in multi-line variables, while "printenv var" will not do that. ====================================================================== Advantages: - "printenv" output much better readable (sorted) - faster! - extendable (additional variable properties can be added) - new, powerful features like "factory reset" or easy switching between several different environment settings ("profiles") Disadvantages: - Image size grows by typically 5...7 KiB (might shrink a bit again on systems with redundant environment with a following patch series) ====================================================================== Implemented: - env command with subcommands: - env print [arg ...] same as "printenv": print environment - env set [-f] name [arg ...] same as "setenv": set (and delete) environment variables ["-f" - force setting even for read-only variables - not implemented yet.] - end delete [-f] name not implemented yet ["-f" - force delete even for read-only variables] - env save same as "saveenv": save environment - env export [-t | -b | -c] addr [size] export internal representation (hash table) in formats usable for persistent storage or processing: -t: export as text format; if size is given, data will be padded with '\0' bytes; if not, one terminating '\0' will be added (which is included in the "filesize" setting so you can for exmple copy this to flash and keep the termination). -b: export as binary format (name=value pairs separated by '\0', list end marked by double "\0\0") -c: export as checksum protected environment format as used for example by "saveenv" command addr: memory address where environment gets stored size: size of output buffer With "-c" and size is NOT given, then the export command will format the data as currently used for the persistent storage, i. e. it will use CONFIG_ENV_SECT_SIZE as output block size and prepend a valid CRC32 checksum and, in case of resundant environment, a "current" redundancy flag. If size is given, this value will be used instead of CONFIG_ENV_SECT_SIZE; again, CRC32 checksum and redundancy flag will be inserted. With "-b" and "-t", always only the real data (including a terminating '\0' byte) will be written; here the optional size argument will be used to make sure not to overflow the user provided buffer; the command will abort if the size is not sufficient. Any remainign space will be '\0' padded. On successful return, the variable "filesize" will be set. Note that filesize includes the trailing/terminating '\0' byte(s). Usage szenario: create a text snapshot/backup of the current settings: => env export -t 100000 => era ${backup_addr} +${filesize} => cp.b 100000 ${backup_addr} ${filesize} Re-import this snapshot, deleting all other settings: => env import -d -t ${backup_addr} - env import [-d] [-t | -b | -c] addr [size] import external format (text or binary) into hash table, optionally deleting existing values: -d: delete existing environment before importing; otherwise overwrite / append to existion definitions -t: assume text format; either "size" must be given or the text data must be '\0' terminated -b: assume binary format ('\0' separated, "\0\0" terminated) -c: assume checksum protected environment format addr: memory address to read from size: length of input data; if missing, proper '\0' termination is mandatory - env default -f reset default environment: drop all environment settings and load default environment - env ask name [message] [size] same as "askenv": ask for environment variable - env edit name same as "editenv": edit environment variable - env run same as "run": run commands in an environment variable ====================================================================== TODO: - drop default env as implemented now; provide a text file based initialization instead (eventually using several text files to incrementally build it from common blocks) and a tool to convert it into a binary blob / object file. - It would be nice if we could add wildcard support for environment variables; this is needed for variable name auto-completion, but it would also be nice to be able to say "printenv ip*" or "printenv *addr*" - Some boards don't link any more due to the grown code size: DU405, canyonlands, sequoia, socrates. => cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>, Stefan Roese <sr@denx.de>, Heiko Schocher <hs@denx.de> - Dropping forceenv() causes build problems on schmoogie => cc: Sergey Kubushyn <ksi@koi8.net> - Build tested on PPC and ARM only; runtime tested with NOR and NAND flash only => needs testing!! Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>, Cc: Stefan Roese <sr@denx.de>, Cc: Heiko Schocher <hs@denx.de> Cc: Sergey Kubushyn <ksi@koi8.net>
* Make getenv() work before relocation.Wolfgang Denk2010-09-19-2/+3
| | | | | | | | | | | | | | | | | | | So far, getenv() would work before relocation is most cases, even though it was not intended to be used that way. When switching to a hash table based implementation, this would break a number of boards. For convenience, we make getenv() check if it's running before relocation and, if so, use getenv_f() internally. Note that this is limited to simple cases, as we use a small static buffer (32 bytes) in the global data for this purpose. For this reason, it is also not a good idea to convert all current uses of getenv_f() into getenv() - some of the existing use cases need to be able to deal with longer variable values, so getenv_f() is still needed and recommended for use before relocation. Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Rename Security Engine Job Queue to Job Ring to match docsKumar Gala2010-08-19-7/+7
| | | | | | | | Official docs call it the Job Ring not Job Queue for the p4080 security block. Match the docs to reduce confusion. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: share PIC defines among 85xx and 86xxKim Phillips2010-08-19-6/+7
| | | | | | | | | | fixes breakeage introduced by commit a37c36f4e70bada297f281b0e542539ad43e50f6 "powerpc/8xxx: query feature reporting register for num cores on unknown cpus" Reported-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-marvellWolfgang Denk2010-08-10-0/+3
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| * ide: add configurationAlbert Aribaud2010-08-08-0/+3
| | | | | | | | | | | | | | | | | | | | CONFIG_IDE_SWAP_IO This configuration option replaces a complex conditional in cmd_ide.c with an explicit define to be added to SoC or board configs. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
* | powerpc/8xxx: query feature reporting register for num cores on unknown cpusKim Phillips2010-08-01-0/+2
| | | | | | | | | | | | | | | | | | | | doing so helps avant garde users, such as those using simulators that allow users to configure the number of cores, so as to not have to manually adjust u-boot sources. h/w should also be reliably setting FRR NCPU in the future. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/8xxx: Enable DDR3 RDIMM supportyork2010-07-26-0/+3
| | | | | | | | | | | | | | | | | | Enabled registered DIMMs using data from SPD. RDIMMs have registers which need to be configured before using. The register configuration words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software should read those RCWs and put into DDR controller before initialization. Signed-off-by: York Sun <yorksun@freescale.com>
* | powerpc/8xxx: Enabled address hashing for 85xxyork2010-07-26-0/+2
| | | | | | | | | | | | | | For 85xx silicon which supports address hashing, it can be activated by hwconfig. Signed-off-by: York Sun <yorksun@freescale.com>
* | powerpc/8xxx: Enable quad-rank DIMMs.york2010-07-26-0/+1
| | | | | | | | | | | | | | Previous code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by: York Sun <yorksun@freescale.com>
* | powerpc/p4080: Add workaround for erratum CPU22Kumar Gala2010-07-26-0/+1
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p4080: Add support for initializing SERDESKumar Gala2010-07-26-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for initializing the SERDES blocks on CoreNet style QoriQ devices and the p4080 specific SERDES tables to know which actual componetns are enabled. Additionally, split out the Frame Manger (FMAN) into its specific ethernet ports instead of gross level of the full FMAN. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add support to initialize LIODN registers and portalsKumar Gala2010-07-26-0/+201
| | | | | | | | | | | | | | | | | | | | | | On the new QorIQ/CoreNet based platforms we need to initialize the "portals" as access into the Data Path subystem as well as Logical IO Device Numbers (LIODN) that are used for the IOMMU (PAMU). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/fsl_fman: Add initial fman immap structuresKumar Gala2010-07-26-0/+213
| | | | | | | | | | | | Add basic structures for Frame Manager on P4080/P3041/P5020 devices Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add additional p4080 platform related defines/structsKumar Gala2010-07-26-22/+197
|/ | | | | | | | | | | | | | | * Added PCIE4 address, offset, DEVDISR & LAW target ID * Added new p4080 DDR registers and defines to immap * Add missing corenet platform DEVDISR related defines * Updated ccsr_gur to include LIODN registers * Add RCWSR defines * Added Basic qman, pme, bman immap structs * Added SATA related offsets & addresses * Added Frame Manager 1/2 offsets & addresses * Renamed CONFIG_SYS_TSEC1_OFFSET to CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET * Added various offsets and addresses that where missing Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-07-24-4/+6
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| * ppc4xx: DDR/ECC: Use correct macros to clear error statusStefan Roese2010-07-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use the correct macro instead of the hardcoded 0x4c to clear the ECC status in the 440/460 DDR(2) error status register after ECC initialization. Also the non-440 parts (405EX(r) right now) and the IBM DDR PPC variants (440GX) use a different registers to clear this error status. Use the correct ones. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Only define DDR2 registers for the correct PowerPC variantsStefan Roese2010-07-23-4/+4
| | | | | | | | | | | | | | Make sure that some SDRAM/DDR2 registers are only defined for the PPC variants really implementing those registers. Signed-off-by: Stefan Roese <sr@denx.de>
* | powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured supportKumar Gala2010-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p3041: Add various p3041 related definesKumar Gala2010-07-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p3041 to cpu_type_list and SVR list * Added number of LAWs for p3041 * Set CONFIG_MAX_CPUS to 4 for p3041 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/p5020: Add various p5020 related defines (and p5010)Kumar Gala2010-07-20-0/+6
| | | | | | | | | | | | | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p5020 & p5010 to cpu_type_list and SVR list * Added number of LAWs for p5020 * Set CONFIG_MAX_CPUS to 2 for p5020 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala2010-07-20-3/+81
| | | | | | | | | | | | | | | | | | | | | | Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.hKumar Gala2010-07-20-0/+17
| | | | | | | | | | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on MPC8641 boards since its really PCIE controllers and not PCI. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.hKumar Gala2010-07-20-0/+20
|/ | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Move p1022ds slot code into board fileKumar Gala2010-07-16-2/+0
| | | | | | | | The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: add support for the Freescale P1022DS reference boardTimur Tabi2010-07-16-0/+2
| | | | | | | | | | | | | Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: add LAW target to fsl_pci_info structureTimur Tabi2010-07-16-8/+11
| | | | | | | | | | | | | Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that we can capture the LAW target for a given PCI or PCIE controller. Also update the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure. This will allow future PCI[E] code to configure the LAW target automatically, rather than requiring each board to it for each PCI controller separately. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support for link stack & STAC on e5500Kumar Gala2010-07-16-1/+3
| | | | | | | | The e5500 has a link register stack and segment target address cache. Its safe to enable these bits on older e500 cores as the bits are implemented in the register. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc 83xx/85xx: Merge lbc upmconfig codeBecky Bruce2010-07-16-0/+3
| | | | | | | | | | Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/misc/fsl_law.c: Rearrange code to avoid duplicationBecky Bruce2010-07-16-0/+1
| | | | | | | | The current code redefines functions based on FSL_CORENET_ vs not - create macros/inlines instead that hide the differences. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Add print_tlbcam() functionBecky Bruce2010-07-16-0/+1
| | | | | | | This dumps out the contents of TLB1 on 85xx-based systems. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: tlb.c cleanupsBecky Bruce2010-07-16-0/+1
| | | | | | | | | | | Extract the operation to read a tlb into a function - we will need this later to print out the tlbs, and there's no point in duplicating the code. Create a TSIZE_TO_BYTES macro to deal with the conversion from the MAS field to an actual size instead of duplicating this in code. There are a few misc other minor cleanups. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-141/+82
| | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtbKumar Gala2010-07-16-1/+2
| | | | | | | If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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