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* powerpc: P2020RDB-PC: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P2020RDB_PC instead of sharing with P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P2020RDB. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1025RDB: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1025RDB. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1024RDB: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P1024RDB instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and macros. Remove macro CONFIG_P1024RDB. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1021RDB: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P1021RDB instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and macros. Remove macro CONFIG_P1021RDB. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1020UTM: Separate from P1_P2_RDB_P2 in KconfigYork Sun2016-11-23-0/+4
| | | | | | | | | Use TARGET_P1020UTM instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1020UTM. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1020RDB-PD: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P1020RDB_PD instead of sharing with P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1020RDB_PD. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1020RDB-PC: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P1020RDB_PC instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1020RDB_PC. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1020MBG: Separate from P1_P2_RDB_PC in KconfigYork Sun2016-11-23-0/+5
| | | | | | | | | Use TARGET_P1020MBG instead of sharing with TARGET_P1_P2_RDB_PC to simplify Kconfig and other macros. Remove macro CONFIG_P1020MBG. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1017: Drop configuration for P1017York Sun2016-11-23-1/+0
| | | | | | | P1017 is a single-core version of P1023. There is no P1017 target configured. Drop related macros. P1017 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1014: Drop configuration for P1014York Sun2016-11-23-3/+1
| | | | | | | P1014 is a variant of P1010. There is no P1014 target configured. Drop related macros. P1014 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1013: Drop configuration for P1013York Sun2016-11-23-1/+0
| | | | | | | P1013 is a single-core version of P1022. There is no P1022 target configured. Drop related macros. P1022 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1012: Drop configuration for P1012York Sun2016-11-23-2/+1
| | | | | | | P1012 is a single-core version of P1021. There is no P1012 target configured. Drop related macros. P1012 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1011: Remove macro CONFIG_P1011York Sun2016-11-23-1/+4
| | | | | | | Replace CONFIG_P1011 with ARCH_P1011 in Kconfig. P1011RDB seems to be in scrapyard though. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1023: Remove macro CONFIG_P1023York Sun2016-11-23-1/+5
| | | | | | | Replace CONFIG_P1023 with ARCH_P1023 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1022: Remove macro CONFIG_P1022York Sun2016-11-23-2/+7
| | | | | | | Replace CONFIG_P1022 with ARCH_P1022 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1010RDB: Remove macros CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PBYork Sun2016-11-23-2/+8
| | | | | | | Remove CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB and split TARGET_P1010RDB to TARGET_P1010RDB_PA and TARGET_P1010RDB_PB in Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1010: Remove macro CONFIG_P1010York Sun2016-11-23-2/+6
| | | | | | | Replace CONFIG_P1010 with ARCH_P1010 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8572: Remove macro CONFIG_MPC8572York Sun2016-11-23-1/+6
| | | | | | | Replace CONFIG_MPC8572 with ARCH_MPC8572 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8569: Remove macro CONFIG_MPC8569York Sun2016-11-23-4/+8
| | | | | | | Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8568: Remove macro CONFIG_MPC8568York Sun2016-11-23-1/+5
| | | | | | | Replace CONFIG_MPC8568 with ARCH_MPC8568 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8560: Remove macro CONFIG_MPC8560York Sun2016-11-23-3/+7
| | | | | | | Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8555CDS: Remove macro CONFIG_MPC8555CDSYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_MPC8555CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8555: Remove macro CONFIG_MPC8555York Sun2016-11-23-3/+7
| | | | | | | Replace CONFIG_MPC8555 with ARCH_MPC8555 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8541CDS: Remove macro CONFIG_MPC8541CDSYork Sun2016-11-23-1/+1
| | | | | | Replace with CONFIG_TARGET_MPC8541CDS from Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: mpc8541: Remove macro CONFIG_MPC8541York Sun2016-11-23-3/+7
| | | | | | | Replace CONFIG_MPC8541 with ARCH_MPC8541 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: mpc8540: Remove macro CONFIG_MPC8540York Sun2016-11-23-3/+7
| | | | | | | Replace CONFIG_MPC8540 with ARCH_MPC8540 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8536: Move CONFIG_MPC8536 to Kconfig optionYork Sun2016-11-23-1/+5
| | | | | | | Replace CONFIG_MPC8536 with ARCH_MPC8536 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: C29X: Move CONFIG_PPC_C29X to Kconfig optionYork Sun2016-11-23-2/+6
| | | | | | | Replace CONFIG_PPC_C29X with ARCH_C29X in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: BSC9131/2: Move CONFIG_BSC9131/2 to Kconfig optionsYork Sun2016-11-23-1/+9
| | | | | | | | | Replace CONFIG_BSC9131, CONFIG_BSC9132 with ARCH_BSC9131, ARCH_BSC9132 Kconfig options. Also drop #ifdef in BSC9131RDB.h since it is redundant. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8544: Move CONFIG_MPC8544 to Kconfig optionYork Sun2016-11-23-3/+8
| | | | | | Replace CONFIG_MPC8544 with ARCH_MPC8544 in Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8548: Move CONFIG_MPC8548 to Kconfig optionYork Sun2016-11-23-2/+8
| | | | | | Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
* Fix spelling of "resetting".Vagrant Cascadian2016-10-31-2/+4
| | | | | | | | Cover-Letter: Fixes several spelling errors for the words "resetting", "extended", "occur", and "multiple". Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* arch: powerpc: Remove unused dts frequency fixup for lbc_clkPrabhakar Kushwaha2016-10-14-11/+0
| | | | | | | | | | lbc_clk is used to fixup dts as "bus frequency". It is not being used by Linux IFC and eLBC driver. So remove unused "bus frqeuency" fix-up of devicre tree. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Various, accumulated typos collected from around the tree.Robert P. J. Day2016-10-06-2/+2
| | | | | | | | | | | | | | | | | | | | | Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
* mpc85xx: powerpc: usb: Modified the erratum A006261 according to endiannessSriram Dash2016-09-28-2/+2
| | | | | | | | | | Modifies erratum implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-26-7/+223
|\ | | | | | | | | | | | | trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
| * fsl: serdes: ensure accessing the initialized maps of serdes protocolHou Zhiqiang2016-09-14-7/+223
| | | | | | | | | | | | | | | | | | | | | | | | Up to now, the function is_serdes_configed() doesn't check if the map of serdes protocol is initialized before accessing it. The function is_serdes_configed() will get wrong result when it was called before the serdes protocol maps initialized. As the first element of the map isn't used for any device, so use it as the flag to indicate if the map has been initialized. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-6/+6
| | | | | | | | | | | | | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* | treewide: use #include <...> to include public headersMasahiro Yamada2016-09-23-8/+8
| | | | | | | | | | | | | | | | | | We are supposed to use #include <...> to include headers in the public include paths. We should use #include "..." only for headers in local directories. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arch, board: squash lines for immediate returnMasahiro Yamada2016-09-23-10/+2
| | | | | | | | | | | | | | | | Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>
* | PowerPC: Update MIP405/MIP405T to use Kconfig betterTom Rini2016-09-20-3/+9
| | | | | | | | | | | | | | | | | | | | | | Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config There are two boards, MIP405 and MIP405T that have a few differences. Start by checking for CONFIG_TARGET_MIP405. Then introduce CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert also convert the usage of CONFIG_ISO_STRING to be based on Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Kconfig: Move config IDENT_STRING to KconfigSiva Durga Prasad Paladugu2016-09-20-6/+0
|/ | | | | | | | | Move the config IDENT_STRING to Kconfig and migrate all boards [sivadur: Migrate zynq boards] Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [trini: Update configs, add some default to sunxi Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* net: mii: Changes not made by spatchJoe Hershberger2016-08-15-7/+4
| | | | | | | | | | | | | If the functions passed to the registration function are not in the same C file (extern) then spatch will not handle the dependent changes. Make those changes manually. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> For the 4xx related files: Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* net: mii: Fix changes made by spatchJoe Hershberger2016-08-15-2/+4
| | | | | | | Some of the changes were a bit too complex. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* net: mii: Use spatch to update miiphy_registerJoe Hershberger2016-08-15-17/+43
| | | | | | | Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ppc4xx: Fix platform supportDirk Eibach2016-08-09-21/+45
| | | | | | | | | | | | | | | Commit "ecc3066 Fix board init code to respect the C runtime environment" broke platform support for ppc4xx. start.S prepares a stackframe that is later rendered unusable by appending the reserved space for global data. Instead the reserved space has to be put first. Then the stackframe can be pushed. I can only test the 405EP OCM case. At least all other ppc4xx boards still build. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* treewide: move CONFIG_PHYS_64BIT to KconfigMasahiro Yamada2016-08-05-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so that it is always available to the build system. Otherwise we can run into cases where we have inconsistent sizes of certain attributes. Ravi Babu reported offset mismatch of struct dwc3 across files since commit 95ebc253e6d4 ("types.h: move and redefine resource_size_t"). Since the commit, resource_addr_t points to phys_addr_t, whose size is dependent on CONFIG_PHYS_64BIT for ARM architecture. I tried my best to use "select" where possible (for example, ARMv8 architecture) because I think this kind of option is generally user- unconfigurable. However, I see some of PowerPC boards have 36BIT defconfigs as well as 32BIT ones. I moved CONFIG_PHYS_64BIT to the defconfigs for such boards. CONFIG_36BIT is no longer referenced, so all of the defines were removed from CONFIG_SYS_EXTRA_OPTIONS. Fixes: 95ebc253e6d4 ("types.h: move and redefine resource_size_t") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Ravi Babu <ravibabu@ti.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/86xx: Pass -mcpu=7400 to GCCScott Wood2016-07-25-1/+1
| | | | | | | | Without this, GCC uses the toolchain default, which may be incompatible with -maltivec. Signed-off-by: Scott Wood <oss@buserror.net> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/mpc85xx: T104x: Add nand secure boot targetSumit Garg2016-07-21-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. For secure boot target from NAND, the text base for SPL is kept same as non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000) As a the virtual and physical address of CPC would be different. The virtual address 0xFFFx_xxxx needs to be mapped to physical address 0xBFFx_xxxx. Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000 and update DCFG SCRTACH1 register with location of Header required for secure boot. The changes are similar to commit 467a40dfe35f48d830f01a72617207d03ca85b4d powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC is only 256K and thus SPL framework is used. The changes are only applicable for SPL U-Boot running out of CPC SRAM and not the next level U-Boot loaded on DDR. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPLSumit Garg2016-07-21-0/+16
| | | | | | | | | | | | | | | | As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-07-16 11:00:31 +0000