summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu
Commit message (Collapse)AuthorAgeLines
* Various, accumulated typos collected from around the tree.Robert P. J. Day2016-10-06-2/+2
| | | | | | | | | | | | | | | | | | | | | Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
* mpc85xx: powerpc: usb: Modified the erratum A006261 according to endiannessSriram Dash2016-09-28-2/+2
| | | | | | | | | | Modifies erratum implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-26-7/+223
|\ | | | | | | | | | | | | trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
| * fsl: serdes: ensure accessing the initialized maps of serdes protocolHou Zhiqiang2016-09-14-7/+223
| | | | | | | | | | | | | | | | | | | | | | | | Up to now, the function is_serdes_configed() doesn't check if the map of serdes protocol is initialized before accessing it. The function is_serdes_configed() will get wrong result when it was called before the serdes protocol maps initialized. As the first element of the map isn't used for any device, so use it as the flag to indicate if the map has been initialized. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-6/+6
| | | | | | | | | | | | | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* | treewide: use #include <...> to include public headersMasahiro Yamada2016-09-23-8/+8
| | | | | | | | | | | | | | | | | | We are supposed to use #include <...> to include headers in the public include paths. We should use #include "..." only for headers in local directories. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arch, board: squash lines for immediate returnMasahiro Yamada2016-09-23-10/+2
| | | | | | | | | | | | | | | | Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>
* | PowerPC: Update MIP405/MIP405T to use Kconfig betterTom Rini2016-09-20-3/+9
| | | | | | | | | | | | | | | | | | | | | | Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config There are two boards, MIP405 and MIP405T that have a few differences. Start by checking for CONFIG_TARGET_MIP405. Then introduce CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert also convert the usage of CONFIG_ISO_STRING to be based on Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Kconfig: Move config IDENT_STRING to KconfigSiva Durga Prasad Paladugu2016-09-20-6/+0
|/ | | | | | | | | Move the config IDENT_STRING to Kconfig and migrate all boards [sivadur: Migrate zynq boards] Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [trini: Update configs, add some default to sunxi Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
* net: mii: Changes not made by spatchJoe Hershberger2016-08-15-7/+4
| | | | | | | | | | | | | If the functions passed to the registration function are not in the same C file (extern) then spatch will not handle the dependent changes. Make those changes manually. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> For the 4xx related files: Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* net: mii: Fix changes made by spatchJoe Hershberger2016-08-15-2/+4
| | | | | | | Some of the changes were a bit too complex. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* net: mii: Use spatch to update miiphy_registerJoe Hershberger2016-08-15-17/+43
| | | | | | | Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ppc4xx: Fix platform supportDirk Eibach2016-08-09-21/+45
| | | | | | | | | | | | | | | Commit "ecc3066 Fix board init code to respect the C runtime environment" broke platform support for ppc4xx. start.S prepares a stackframe that is later rendered unusable by appending the reserved space for global data. Instead the reserved space has to be put first. Then the stackframe can be pushed. I can only test the 405EP OCM case. At least all other ppc4xx boards still build. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* treewide: move CONFIG_PHYS_64BIT to KconfigMasahiro Yamada2016-08-05-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so that it is always available to the build system. Otherwise we can run into cases where we have inconsistent sizes of certain attributes. Ravi Babu reported offset mismatch of struct dwc3 across files since commit 95ebc253e6d4 ("types.h: move and redefine resource_size_t"). Since the commit, resource_addr_t points to phys_addr_t, whose size is dependent on CONFIG_PHYS_64BIT for ARM architecture. I tried my best to use "select" where possible (for example, ARMv8 architecture) because I think this kind of option is generally user- unconfigurable. However, I see some of PowerPC boards have 36BIT defconfigs as well as 32BIT ones. I moved CONFIG_PHYS_64BIT to the defconfigs for such boards. CONFIG_36BIT is no longer referenced, so all of the defines were removed from CONFIG_SYS_EXTRA_OPTIONS. Fixes: 95ebc253e6d4 ("types.h: move and redefine resource_size_t") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Ravi Babu <ravibabu@ti.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/86xx: Pass -mcpu=7400 to GCCScott Wood2016-07-25-1/+1
| | | | | | | | Without this, GCC uses the toolchain default, which may be incompatible with -maltivec. Signed-off-by: Scott Wood <oss@buserror.net> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/mpc85xx: T104x: Add nand secure boot targetSumit Garg2016-07-21-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. For secure boot target from NAND, the text base for SPL is kept same as non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000) As a the virtual and physical address of CPC would be different. The virtual address 0xFFFx_xxxx needs to be mapped to physical address 0xBFFx_xxxx. Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000 and update DCFG SCRTACH1 register with location of Header required for secure boot. The changes are similar to commit 467a40dfe35f48d830f01a72617207d03ca85b4d powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC is only 256K and thus SPL framework is used. The changes are only applicable for SPL U-Boot running out of CPC SRAM and not the next level U-Boot loaded on DDR. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPLSumit Garg2016-07-21-0/+16
| | | | | | | | | | | | | | | | As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* Various, unrelated tree-wide typo fixes.Robert P. J. Day2016-07-16-2/+2
| | | | | | | | | | | | | | | | | | | Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* powerpc: mpc85xx: Do not build errata command in SPLMarek Vasut2016-07-05-0/+2
| | | | | | | | | The errata command is useless in SPL, so don't build it. This fixes multiple build failures on PowerPC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: York Sun <york.sun@nxp.com> Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")
* arch/powerpc: Simplify some calculations using ARRAY_SIZE() macro.Robert P. J. Day2016-06-03-14/+14
| | | | | | | | Replace a number of array length calculations with the ARRAY_SIZE() macro, for clarity. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com>
* Delete tests of CONFIG_OF_LIBFDT when testing CONFIG_OF_BOARD_SETUPRobert P. J. Day2016-05-27-8/+8
| | | | | | | | | | | | | | | | Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT: config OF_BOARD_SETUP bool "Set up board-specific details in device tree before boot" depends on OF_LIBFDT ... remove superfluous tests of CONFIG_OF_LIBFDT when testing for CONFIG_OF_BOARD_SETUP. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> [trini: Typo fix: s/ifdefi/ifdef/] Signed-off-by: Tom Rini <trini@konsulko.com>
* powerpc: Drop unused code related to generic boardSimon Glass2016-05-27-13/+1
| | | | | | Since generic board init is enabled, this is not used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-05-25-0/+23
|\
| * powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cacheAneesh Bansal2016-05-24-0/+23
| | | | | | | | | | | | | | | | | | | | While enabling L2 cache, the value of L2PE (L2 cache parity/ECC error checking enable) must not be changed while the L2 cache is enabled. So, L2PE must be set before enabling L2 cache. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | crypto/fsl: add support for multiple SEC engines initializationAlex Porosanu2016-05-18-0/+9
|/ | | | | | | | | For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Fix various typos, scattered over the code.Robert P. J. Day2016-05-05-1/+1
| | | | | | | | | | | | | Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
* powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xxmario.six@gdsys.cc2016-04-08-7/+32
| | | | | | | | | | | | | To enable DM on MPC85xx, we need pre-relocation malloc, which is implemented in this patch. We also make sure that the IVORs are always 4-aligned on e500 to prevent alignment exceptions caused by code changes in start.S. Signed-off-by: Mario Six <mario.six@gdsys.cc> Cc: York Sun <york.sun@nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* usb: Rename ehci-fsl.h to ehci-ci.hMateusz Kulikowski2016-04-01-1/+1
| | | | | | | | | | | | | Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors. This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* Fix spelling of "transferred".Vagrant Cascadian2016-03-22-1/+1
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* fm: fdt: Move fman ucode fixup to driver codeQianyu Gong2016-02-24-120/+5
| | | | | | | | | Not only powerpc/mpc85xx but also Freescale Layerscape platforms will use fdt_fixup_fman_firmware() to insert Fman ucode blob into the device tree. So move the function to Fman driver code. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* qe: move drivers/qe/qe.h to include/fsl_qe.hQianyu Gong2016-02-24-2/+2
| | | | | | | | As the QE firmware struct is shared with Fman, move the header file out of drivers/qe/. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/SECURE_BOOT: Add PAMU driverAneesh Bansal2016-02-24-8/+499
| | | | | | | | | | | | | | | | PAMU driver basic support for usage in Secure Boot. In secure boot PAMU is not in bypass mode. Hence to use any peripheral (SEC Job ring in our case), PAMU has to be configured. The patch reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3. The Header file pamu.h and few functions in driver have been derived from Freescale Libos. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Remove unused CONFIG_MODEM_SUPPORT option and associated dead code.David Müller (ELSOFT AG)2016-02-08-22/+0
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* Use correct spelling of "U-Boot"Bin Meng2016-02-06-1/+1
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-01-27-0/+17
|\
| * secure_boot: enable chain of trust for PowerPC platformsAneesh Bansal2016-01-27-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chain of Trust is enabled for PowerPC platforms for Secure Boot. CONFIG_BOARD_LATE_INIT is defined. In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following: - If boot mode is non-secure, return (No Change) - If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add workaround for A009663Shengzhou Liu2016-01-25-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] to the desired value after DDR initialization has completed. When DDR controller is configured to operate in auto-precharge mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | ppc: xilinx-ppc4xx: Port to DM serialRicardo Ribalda Delgado2016-01-27-0/+8
| | | | | | | | | | | | | | | | | | | | | | xilinx_uartlite has been ported to DM, this patch makes the xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new DM driver. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | mailaddr: Update mail addressRicardo Ribalda Delgado2016-01-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | The old mail address will stop working soon. Update it all the files Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | xilinx-ppc440: Remove support for v5fx30tevalRicardo Ribalda Delgado2016-01-27-4/+0
| | | | | | | | | | | | | | | | | | | | | | It is just a specialized version of xilinx-ppc440 Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | ppc: xilinx-ppc405: Remove support for fx12mmRicardo Ribalda Delgado2016-01-27-4/+0
| | | | | | | | | | | | | | | | | | | | | | It is just a specialized version of the xilinx-ppc405 Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | ppc: xilinx-ppc440: Remove support for ml507Ricardo Ribalda Delgado2016-01-27-4/+0
| | | | | | | | | | | | | | | | | | | | | | ml507 is just a specialized version of the xilinx-ppc440-generic Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-01-25-4/+15
|\ \
| * | arch/powperpc: Fix start_align due to use of __ffs64() instead ffs64()Ashish kumar2016-01-25-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Incorrect DDR law was created in case of B4860qds after commit 2d2f490d. Return value of ffs64() differs from __ffs64(), eg. ffs64(0x80000000) = 0x20 __ffs64(0x80000000) = 0x1f As a result of this change, callers need to adjust the expected return value by removing -1. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seqPrabhakar Kushwaha2016-01-25-0/+11
| |/ | | | | | | | | | | | | | | | | | | | | | | Users migrating Freescale's PowerPC SoC U-Boot code to their custom board, often overlook the need to execute set_liodns() and setup_portals() being called by platform files. So Move set_liodns() and setup_portals() to common u-boot boot sequence Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | serial: Remove serial_putc_raw_devTom Rini2016-01-25-23/+0
|/ | | | | | | | | clang-3.8 reports that serial_putc_raw_dev in serial_ns16550.c is unused. Further investigation shows that we have 3 places that implement this function and no callers, remove. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-9/+3
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-14-5/+5
| | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* Fix board init code to respect the C runtime environmentAlbert ARIBAUD2016-01-13-2/+4
| | | | | | | | | | | | | board_init_f_mem() alters the C runtime environment's stack it is actually already using. This is not a valid behaviour within a C runtime environment. Split board_init_f_mem into C functions which do not alter their own stack and always behave properly with respect to their C runtime environment. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Thomas Chou <thomas@wytron.com.tw>
* powerpc: Various typo fixes under arch/powerpc/cpu/mpc83xxRobert P. J. Day2016-01-08-20/+20
| | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
generated by cgit v1.1 at 2024-07-19 13:27:34 +0000