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* | powerpc/85xx: Add support for Integrated Flash Controller (IFC)Dipen Dudhat2011-04-04-1/+91
* | powerpc/85xx: Add SERDES support for P1010/P1014Prabhakar Kushwaha2011-04-04-0/+77
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* powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCsPrabhakar Kushwaha2011-03-29-1/+48
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-03-27-38/+38
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| * rename _end to __bss_end__Po-Yu Chuang2011-03-27-38/+38
* | powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134York Sun2011-03-24-0/+41
* | powerpc/mpc8xxx: disable rcw_en bit for non-DDR3York Sun2011-03-24-0/+2
* | powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address ParityYork Sun2011-03-24-1/+2
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* powerpc/85xx: Fix synchronization of timebase on MP bootKumar Gala2011-03-15-0/+9
* mpc8[5/6]xx: Ensure POST word does not get resetJohn Schmoller2011-03-13-0/+32
* powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet PlatformsEd Swarthout2011-03-05-2/+2
* powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registersYork Sun2011-03-05-6/+14
* powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3York Sun2011-02-10-1/+4
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-02-06-8/+26
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| * mpc83xx: Use correct register to calculate clocks.Joakim Tjernlund2011-02-05-7/+8
| * mpc83xx: fix pcie configuration space read/writeLeo Liu2011-02-05-1/+18
* | powerpc/8xxx: Fix possible compile issue related to P1013Kumar Gala2011-02-04-1/+1
* | powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134York Sun2011-02-03-1/+110
* | powerpc/85xx: Rename MPC8572 DDR erratum to DDR115York Sun2011-02-03-2/+4
* | powerpc/85xx: Remove unnecessary polling loop from DDR initYork Sun2011-02-03-2/+0
* | fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)Kumar Gala2011-02-03-0/+3
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* powerpc/8xxx: Fix compile warning when build for a DDR1 or DDR2 boardKumar Gala2011-01-24-1/+1
* powerpc/85xx: Protect all LBC code with CONFIG_FSL_LBCDipen Dudhat2011-01-19-2/+13
* powerpc/p4080: Fix warning in serdes code from early use of hwconfigYork Sun2011-01-19-3/+14
* mpc85xx: Implement workaround for erratum DDR-A003York Sun2011-01-19-1/+83
* mpc85xx: Enable unique mode registers and dynamic ODT for DDR3York Sun2011-01-19-54/+512
* mpc85xx: Adding more registers and optionsYork Sun2011-01-19-3/+9
* mpc8xxx: Enable ECC on/off control in hwconfigYork Sun2011-01-19-3/+6
* mpc8xxx: Display RDIMM if detectedYork Sun2011-01-19-12/+8
* powerpc/8xxx: Add hwconfig APIs to address early parsing used by DDR initKumar Gala2011-01-19-19/+59
* powerpc/p2040: Add various p2040 specific informationKumar Gala2011-01-19-0/+68
* powerpc/p5020: Add various p5020 specific informationKumar Gala2011-01-19-0/+258
* powerpc/p3041: Add various p3041 specific informationKumar Gala2011-01-19-0/+258
* powerpc/85xx: Add Support for Freescale P1014 ProcessorPoonam Aggrwal2011-01-19-0/+3
* powerpc/85xx: Add Support for Freescale P1010 ProcessorPoonam Aggrwal2011-01-19-1/+4
* powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.hKumar Gala2011-01-19-2/+6
* 8xxx/ddr: add support to only compute the ddr sdram sizeHaiying Wang2011-01-19-9/+40
* powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080)Kumar Gala2011-01-14-1/+9
* powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)Kumar Gala2011-01-14-0/+6
* powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)Kumar Gala2011-01-14-0/+8
* powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr codeKumar Gala2011-01-14-1/+21
* fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)Roy Zang2011-01-14-0/+11
* fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)Roy Zang2011-01-14-0/+3
* fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)Jerry Huang2011-01-14-1/+4
* powerpc/86xx: Enable common SRIO init codeKumar Gala2011-01-14-2/+12
* powerpc/8xxx: Refactor SRIO initialization into common codeKumar Gala2011-01-14-3/+122
* powerpc/85xx: Fix bug in dcache_disableKumar Gala2011-01-14-2/+2
* MPC8xxx DDR: align informational printsBecky Bruce2011-01-14-2/+3
* 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_INBecky Bruce2011-01-14-1/+4
* mpc85xx: rename sdram_init() lbc_sdram_init()Becky Bruce2011-01-14-3/+3
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