summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu/ppc4xx
Commit message (Collapse)AuthorAgeLines
* PPC405EX CHIP_21 erratumSteven A. Falco2011-05-12-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated 4/27/11) states that rev D processors may wake up with the wrong feature set. This patch implements the APM-proposed workaround. To enable this patch for your board, add the appropriate define for your CPU to your board header file. See kilauea.h for more information. The following variants are supported: #define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY Please note that if you select the wrong define, your board will not boot, and JTAG will be required to recover. Tested on custom boards using: CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY <sfalco@harris.com> CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY <eibach@gdsys.de> Signed-off-by: Steve Falco <sfalco@harris.com> Acked-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* Revert "PowerPC: Add support for -msingle-pic-base"Wolfgang Denk2011-04-20-20/+2
| | | | | | | This reverts commit 39768f7715ed637ef02f49fc7de664cc1aaf14b3. Reson: it breaks a number of boards with embedded environment as the code size grows in some places.
* PowerPC: Add support for -msingle-pic-baseJoakim Tjernlund2011-04-11-2/+20
| | | | | | | | | | | | | -msingle-pic-base is a new gcc option for ppc and it reduces the size of my u-boot with 6-8 KB. While at it, add -fno-jump-tables too to save a few more bytes. -msingle-pic-base will be in gcc 4.6, however backported patches are available at http://bugs.gentoo.org/show_bug.cgi?id=347281 Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* PowerPC: Move -fPIC flag to common placeJoakim Tjernlund2011-04-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The -fPIC flag belongs with -mrelocatable, move it there. Also change -fPIC to -fpic as this produces smaller binaries. However, currently -mrelocatable promotes -fpic to -fPIC, a fix for this is in upcoming gcc 4.6 or you can apply this small patch to gcc: diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h index 8da8410..e4b8280 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h @@ -227,7 +227,8 @@ do { \ } \ \ else if (TARGET_RELOCATABLE) \ - flag_pic = 2; \ + if (!flag_pic) \ + flag_pic = 2; \ } while (0) #ifndef RS6000_BI_ARCH -- Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* rename _end to __bss_end__Po-Yu Chuang2011-03-27-3/+3
| | | | | | | Currently, _end is used for end of BSS section. We want _end to mean end of u-boot image, so we rename _end to __bss_end__ first. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* ppc4xx: Fix compilation breakage in miiphy.cStefan Roese2011-01-11-1/+1
| | | | | | | | Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced a small problem in the ppc4xx miiphy.c version. This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* miiphy: convert to linux/mii.hMike Frysinger2011-01-09-36/+36
| | | | | | | | The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* PowerPC: Add relocation support for -fpicJoakim Tjernlund2010-12-17-2/+3
| | | | | | | | | By rearranging the linker script we get support for relocation of -fpic for free. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* xilinx-ppc4xx-generic: Use common u-boot.ldsRicardo Ribalda Delgado2010-12-17-1/+9
| | | | | | | Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Clarify comment about boot chip-select in start.SStefan Roese2010-12-17-12/+14
| | | | | | | Ths old comment was quite screwed up. Replace it with a new version that should be a bit more descriptive. Signed-off-by: Stefan Roese <sr@denx.de>
* do_reset: unify duplicate prototypesMike Frysinger2010-11-28-1/+0
| | | | | | | The duplication of the do_reset prototype has gotten out of hand, and they're not all in sync. Unify them all in command.h. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ppc4xx: Flush complete dcache in relocate_code()Stefan Roese2010-11-28-6/+7
| | | | | | | | | When the cache is enabled in SDRAM we need to flush not only the global data area but also the bd_info struct in relocate_code. This patch now flushed the complete dcache (all dcache lines) via flush_dcache() instead of adding a flush_dcache_range() call for bd_info since this is faster. Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc: cmd_ecctest: Use return value of cmd_usageThomas Weber2010-11-27-4/+2
| | | | | | | | Use the return value of cmd_usage instead of ignoring this and returning a 1. Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* ppc4xx: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-43/+10
| | | | | | | | | | | | | | | | | This commit adapts 4xx boards for partial linking with --gc-sections. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tirumala Marri <tmarri@apm.com> Cc: David Updegraff <dave@cray.com> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Larry Johnson <lrj@acm.org> Cc: Peter De Schrijver <p2@mind.be> Cc: Niklaus Giger <niklaus.giger@netstal.com> Cc: Daniel Poirot <dan.poirot@windriver.com> Acked-by: Stefan Roese <sr@denx.de>
* arch/powerpc/*/config.mk: make CONFIG_SYS_LDSCRIPT settings workWolfgang Denk2010-11-26-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | As we try to get rid of board specific config.mk files we must provide a way for board specific settings of the LDSCRIPT variable (path to the linker script) where needed. We now implement the following hierarchy: - Highest priority has a "#define CONFIG_SYS_LDCONFIG" in the board config file. - If CONFIG_SYS_LDCONFIG is not set, and the system is booting from NAND (CONFIG_NAND_SPL is set), then a board specific linker script board/$(BOARDDIR)/u-boot-nand.lds gets used. - If we are not booting from NAND, we test if a processor specific linker script arch/powerpc/cpu/$(CPU)/u-boot.lds exists; if so we use that. - As default, arch/powerpc/config.mk gets used. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* cpu/ppc4xx/Makefile: build only needed object filesWolfgang Denk2010-11-26-22/+10
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* PowerPC: Don't destroy fixup table while doing fixupsJoakim Tjernlund2010-11-14-1/+1
| | | | | | | | | The fixup procedure just stored a constant value in the fixup table rather than just adjusting the table. Although that doesn't seem to do any harm, it prevents relocation more that once. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk2010-10-26-1/+2
| | | | | | | | | | | | | | | | | | CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZEWolfgang Denk2010-10-26-11/+11
| | | | | | | | | | | | | | | | | | CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be some end address; to make the meaning more clear we rename it into CONFIG_SYS_INIT_RAM_SIZE No other code changes are performed in this patch, only minor editing of white space (due to the changed length) and the comments was done, where noticed. Note that the code for the PATI and cmi_mpc5xx board configurations looks seriously broken. Last known maintainers on Cc: Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Denis Peter <d.peter@mpl.ch> Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* ppc4xx: Change tsr/tcr macros to upper caseStefan Roese2010-10-20-21/+5
| | | | | | Remove uneccessary functions to access the TCR/TSR registers as well. Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc: do not fixup NULL ptrsJoakim Tjernlund2010-10-18-1/+3
| | | | | | | | | | | | | | The fixup routine must not fixup NULL pointers. Problem can be seen by char *testfun(void) __attribute__((weak)); char *(*myfun)(void) = testfun; Then add printf("myfun:%p, &myfun:%p\n", myfun, &myfun); before relocation and after relocation. myfun should be NULL in both cases but it is not. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* powerpc: Remove warm reset entry pointPeter Tyser2010-10-12-1/+5
| | | | | | No boards utilize the warm reset entry point, so remove it. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* APM821xx: Add CPU supportTirumala Marri2010-10-04-7/+103
| | | | | | | | | APM821XX is a new line of SoCs which are derivatives of PPC44X family of processors. This patch adds support of CPU, cache, tlb, 32k ocm, bootstraps, PLB and AHB bus. Signed-off-by: Tirumala R Marri <tmarri@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk2010-09-28-833/+258
|\ | | | | | | | | | | | | Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * ppc4xx: Disable trace broadcast for 44x non debug modeVictor Gallardo2010-09-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default the trace broadcast is enabled on 44x systems. To reduce power consumption when instruction tracing is not needed, disable trace broadcast. Check External Debug Mode (EDM) bit to detect if it should be disabled or not. Resetting system via a debugger will set the DBCR0[EDM] bit. Resetting via u-boot or OS will not. Signed-off-by: Victor Gallardo <vgallardo@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Cleanup of PVR detection code in cpu.cStefan Roese2010-09-23-71/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans the PVR detection code in check_cpu() up a bit. Basically the strings are better seperated, resulting in an easier to understand and maintain code version. The #ifdef's couldn't be removed easily because of two reasons: - Some SoC revisions have the same PVR, so need a way to differentiate between those two SoC's. - In some case statements registers only available in this SoC variant are referenced. Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't add this 440 detection code and vice versa. Resulting in this U-Boot image size change: 405EX (Kilauea): 408 bytes less 440EPx (Sequoia): 604 bytes less 460EX (Canyonlands): 564 bytes less Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-698/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-31/+33
| | | | | | | | | | | | | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specificStefan Roese2010-09-23-2/+2
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-27/+27
| | | | | | | | | | | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx/fdt/flash: Change fdt_fixup_nor_flash_node() to not rely on cs sizeStefan Roese2010-09-23-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the behaviour of the fdt_fixup_nor_flash_node() function. Now it doesn't patch the size of the "reg" property with the chip-select size, but with the size returned from the new function flash_get_bank_size(). This function will return per weak default the flash size of the bank (bank = chip-select numer) detected by the flash driver. If this does not fit your needs, this function may be overridden by a board specific one. For this the parameters needed to be changed. So I intentionally squashed the PPC4xx stuff using this routine into this patch. Otherwise it would not be git-bisectable anymore. The board specific function for the AMCC/APM Ebony eval board is now included in this patch version. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Detlev Zundel <dzu@denx.de> Cc: Gerald Van Baren <vanbaren@cideas.com> Cc: Wolfgang Denk <wd@denx.de>
* | POST cleanup.Michael Zaidman2010-09-21-54/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | - Revives POST for blackfin arch; - Removes redundant code: arch/blackfin/lib/post.c arch/powerpc/cpu/ppc4xx/commproc.c arch/powerpc/cpu/mpc512x/common.c - fixes up the post_word_{load|store} usage. Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> Tested-by: Anatolij Gustschin <agust@denx.de> List of the maintainers of the affected by patch boards: Cc: Stephan Linz <linz@li-pro.net> Cc: Denis Peter <d.peter@mpl.ch> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Stefan Roese <sr@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Niklaus Giger <niklaus.giger@netstal.com> Cc: Larry Johnson <lrj@acm.org> Cc: Feng Kan <fkan@amcc.com>
* ppc4xx: Invalidate d-cache when used as init-ramStefan Roese2010-09-03-0/+5
| | | | | | | | We need to invalidate the data cache after it has been used as init-ram. This problem was detected on the lwmon5 update. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix 440EPx bug in reconfigure_pll()Stefan Roese2010-09-03-9/+18
| | | | | | | | | | | | | | | | This patch fixes a bug in reconfigure_pll(), where the detection of the current bootstrap option is wrong. The ICS bits where incorrectly shifted. This bug was found on the lwmon5 board, which uses bootstrap option H (I2C bootstrap EEPROM). Additionally a bit of code was moved into the if statement, since its only used after later on. No need to run this code all the time. Also, a few empty lines are added to make the code better readable. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rupjyoti Sarmah <rsarmah@amcc.com> Cc: Victor Gallardo <vgallardo@appliedmicro.com>
* miiphy: constify device nameMike Frysinger2010-08-09-2/+2
| | | | | | | The driver name does not need to be writable, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Rename getenv_r() into getenv_f()Wolfgang Denk2010-08-04-1/+1
| | | | | | | | | | | | | | | | | | | While running from flash, i. e. before relocation, we have only a limited C runtime environment without writable data segment. In this phase, some configurations (for example with environment in EEPROM) must not use the normal getenv(), but a special function. This function had been called getenv_r(), with the idea that the "_r" suffix would mean the same as in the _r_eentrant versions of some of the C library functions (for example getdate vs. getdate_r, getgrent vs. getgrent_r, etc.). Unfortunately this was a misleading name, as in U-Boot the "_r" generally means "running from RAM", i. e. _after_ relocation. To avoid confusion, rename into getenv_f() [as "running from flash"] Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* ppc4xx: Add ECC status info to machine-check exception for IBM DDR2 coreStefan Roese2010-07-23-0/+16
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add "ecctest" command to test/simulate ECC errorsStefan Roese2010-07-23-0/+287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the "ecctest" command to test and simulate ECC errors (single bit and/or double bit) while running from SDRAM. Currently only the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT). This is done by copying and calling functions, modifying the SDRAM controller operation mode, in internal SRAM/OCM. For correctable ECC errors (single bit) only the status will be printed since the DDR2 controller doesn't provide the faulting address: => ecctest 1000000 1 Using address 01000000 for 1 bit ECC error injection ECC: Correctable error Uncorrectable ECC errors (double bit) will also display the faulting address: => ecctest 1000000 2 Using address 01000000 for 2 bit ECC error injection ECC: Uncorrectable error at 0x0001000000 To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST in the board config header. Tested on katmai and t3corp. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: DDR/ECC: Use correct macros to clear error statusStefan Roese2010-07-23-1/+20
| | | | | | | | | | | | Use the correct macro instead of the hardcoded 0x4c to clear the ECC status in the 440/460 DDR(2) error status register after ECC initialization. Also the non-440 parts (405EX(r) right now) and the IBM DDR PPC variants (440GX) use a different registers to clear this error status. Use the correct ones. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add CONFIG_DDR_RFDC_FIXED to allow board specific RFDC valuesStefan Roese2010-07-23-0/+12
| | | | | | | | Using this define, a board can define an opimized RFDC value and use the auto calibration code to "tune" the remaining DDR2 controller calibration register. Signed-off-by: Stefan Roese <sr@denx.de>
* Make sure that argv[] argument pointers are not modified.Wolfgang Denk2010-07-04-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* ppc4xx: Cleanup Boot/FLASH TLB reassignment for PPC440/460Stefan Roese2010-07-01-15/+6
| | | | | | | | | | | | | | | | | | Background Info: Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via init.S) to speed up the boot process. In relocate_code (start.S) the cache inhibit attribute for this TLB is set to disable cache. This is needed for the CFI FLASH driver. This patch now cleans this code up: - CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not defined in the top of this file. This way, we can remove an ugly #ifdef in this code. - Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..." statement with "#if defined(CONFIG_440)". - Remove unnecessary cache invalidate calls resulting in faster bootup. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: DDR2: Complete RDSS configuration on non-SPD based boardsStefan Roese2010-07-01-14/+38
| | | | | | | | | As described in item #10 of the SDRAM initialization (chapter 22.2.9 of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The code for this is now factored out and executed for non-SPD based boards as well. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable overwriting of default scan window for IBM DDR2 controllerStefan Roese2010-07-01-12/+5
| | | | | | | | | | | This patch makes it possible to overwrite the default auto-calibration scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with board specific values. The parameters of the weak default function are corrected as well. This way we don't need the casts any more. This feature will be used by an upcoming PPC460GT board port. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable PCIe support without PCI support on PPC440/460Stefan Roese2010-07-01-1/+11
| | | | | | | | | | | By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT, PCI support (host and adapter) will not be enabled. But it's still possible to use the U-Boot PCI infrastructure for the PCIe ports. This configuration option is needed for a new 460GT board, which uses PCIe but has PCI disabled. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable booting with Option E on 460EX/EXr/GTStefan Roese2010-07-01-10/+39
| | | | | | | | | This patch enables booting with option E on the PPC460EX/EXr/GT. When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0. The Software Boot Configuration Procedure is needed to engage the PLL and perform a chip reset. Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc: Consolidate bootcount_{store|load} for PowerPCStefan Roese2010-05-06-24/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch consolidates bootcount_{store|load} for PowerPC by implementing a common version in arch/powerpc/lib/bootcount.c. This code is now used by all PowerPC variants that currently have these functions implemented. The functions now use the proper IO-accessor functions to read/write the values. This code also supports two different bootcount versions: a) Use 2 separate words (2 * 32bit) to store the bootcounter b) Use only 1 word (2 * 16bit) to store the bootcounter Version b) was already used by MPC5xxx. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> for 83xx parts Cc: Michael Zaidman <michael.zaidman@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Anatolij Gustschin <agust@denx.de>
* serial: struct serial_device: add uninit() entry for driversAnatolij Gustschin2010-04-24-0/+2
| | | | | | | | | | | | | | | Subsequent patch extends mpc512x serial driver to support multiple PSC ports. The driver will provide an uninit() function to stop the serial controller and to disable the controller's clock. Adding uninit() entry to struct serial_device allows disabling the serial controller after usage of a stdio serial device. This patch adds uninit() entry to the struct serial_device and fixes initialization of this structure in the code accordingly. Signed-off-by: Anatolij Gustschin <agust@denx.de>
generated by cgit v1.1 at 2024-11-19 15:45:44 +0000