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* powerpc/p3041: Add various p3041 related definesKumar Gala2010-07-20-0/+2
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p3041 to cpu_type_list and SVR list * Added number of LAWs for p3041 * Set CONFIG_MAX_CPUS to 4 for p3041 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p5020: Add various p5020 related defines (and p5010)Kumar Gala2010-07-20-0/+4
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p5020 & p5010 to cpu_type_list and SVR list * Added number of LAWs for p5020 * Set CONFIG_MAX_CPUS to 2 for p5020 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc 83xx/85xx: Merge lbc upmconfig codeBecky Bruce2010-07-16-0/+50
| | | | | | | | | | Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-0/+85
| | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtbKumar Gala2010-07-16-2/+3
| | | | | | | If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8xxx: Remove cpu-handles for cpus we deleteKumar Gala2010-07-16-6/+30
| | | | | | | We may have cpu-handles pointing to the cpu nodes we delete. If so we should delete the handles as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Add base support for the SEC4Kim Phillips2010-07-16-0/+6
| | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Distinguish between incompatible SEC h/w typesKim Phillips2010-07-16-3/+3
| | | | | | | | | CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: move fsl specific code from common fdt area to mpc8xxx/fdt.cKim Phillips2010-07-16-3/+137
| | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Enabled support for Rev 1.3 SPD for DDR2 DIMMsYork Sun2010-05-12-2/+2
| | | | | | | | | | | | | | SPD has minor change from Rev 1.2 to 1.3. This patch enables Rev 1.3. The difference has ben examined and the code is compatible. Speed bins is not verified on hardware for CL7 at this moment. This patch also enables SPD Rev 1.x where x is up to "F". According to SPD spec, the lower nibble is optionally used to determine which additinal bytes or attribute bits have been defined. Software can safely use defaults. However, the upper nibble should always be checked. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabledKumar Gala2010-05-12-12/+0
| | | | | | | | | | | | The new is_serdes_configured covers a broader range of devices than the PCI specific code. Use it instead as we convert away from the is_fsl_pci_cfg() code. Additionally move to setting LAWs for PCI based on if its configured. Also updated PCI FDT fixup code to remove PCI controllers from dtb if they are configured. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: clean up the io_sel for PCI express of P1022Dave Liu2010-04-26-7/+6
| | | | | | | clean up the wrong io_sel for PCI express according to latest manual. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl-ddr: Add extra cycle to turnaround timesDave Liu2010-04-26-0/+2
| | | | | | | | Add an extra cycle turnaround time to read->write to ensure stability at high DDR frequencies. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Move arch/ppc to arch/powerpcStefan Roese2010-04-21-0/+4421
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
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