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path: root/arch/powerpc/cpu/mpc8xxx/ddr/main.c
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* powerpc/mpc8xxx: Fix DDR SPD failed messageYork Sun2012-10-22-1/+13
* powerpc/mpc8xxx: Fix DDR initialization waiting for D_INITYork Sun2012-10-22-1/+11
* powerpc/mpc8xxx DDR: Fall back to raw timing for first controller onlyYork Sun2012-08-23-1/+1
* powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleavingYork Sun2012-08-23-133/+172
* powerpc/ddr: fix fsl_ddr_get_dimm_params compile errorShaohui Xie2012-08-08-1/+1
* powerpc/8xxx: Add support for interactive DDR programming interfaceYork Sun2011-10-09-3/+6
* powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slotsYork Sun2011-09-29-4/+7
* powerpc/mpc8xxx: Adding fallback to raw timing on supported boardsYork Sun2011-07-11-0/+8
* powerpc/mpc8xxx: Enable calculation for fixed DDR chipsYork Sun2011-07-11-0/+12
* powerpc/mpc8xxx: Add 16-bit support for DDR3York Sun2011-07-11-1/+13
* powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from boardKumar Gala2011-04-04-3/+60
* 8xxx/ddr: add support to only compute the ddr sdram sizeHaiying Wang2011-01-19-5/+26
* MPC8xxx DDR: align informational printsBecky Bruce2011-01-14-2/+3
* powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4york2010-07-26-20/+20
* Move arch/ppc to arch/powerpcStefan Roese2010-04-21-0/+479
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