arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	powerpc/85xx: Add support for RMan LIODN initialization	Kumar Gala	2011-10-18	-0/+14
\| \| \| \| \| \| \| \| \|	This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Update setting of SRIO LIODNs	Kumar Gala	2011-10-18	-0/+6
\| \| \| \| \| \| \| \| \| \| \|	Properly set the LIODN values associated with SRIO controller. On P4080/P3060 we have an LIODN per port and one for the RMU. On P2041/P3041/P5020 we have 2 LIODNs per port. Update the tables for all of these devices to properly handle both styles. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/p3041: fixup portal config info	Haiying Wang	2011-10-13	-10/+10
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	P3041 has 10 qman portals, we need to configure all of them: * As there are only 4 physical cores sdest can only be 0 to 3 * We assign dqrr & frame data LIODNs for all portals so if they are utilized the proper mapping tables can be setup uniquely (PAMU stashing) * We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN assignments are tuned around an assumption of at most 5 partitions. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't set	Kumar Gala	2011-07-11	-4/+7
\| \| \| \| \| \| \| \| \| \| \|	Add ifdef protection for qp_info and liodn associated with Q/BMan. Also rearrange setting of _tbl_sz variables to utilize existing ifdef protection for things like FMAN. Also add protection around setup_portals() call in corenet_ds board code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Fix setting of LIODN prop in PCIe nodes on P3041/P5020	Laurentiu TUDOR	2011-04-04	-5/+5
\| \| \| \| \| \| \| \| \| \| \| \| \|	We utilize the compatible string to find the node to add fsl,liodn property to. However P3041 & P5020 don't have "fsl,p4080-pcie" compatible for their PCIe controllers as they aren't backwards compatible. Allow the macro's to specify the PCIe compatible to use to allow SoC uniqueness. On P3041 & P5020 we utilize "fsl,qoriq-pcie-v2.2" for the PCIe controllers. Signed-off-by: Laurentiu TUDOR <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/p3041: Add various p3041 specific information	Kumar Gala	2011-01-19	-0/+105
	Add P3041 SoC specific information: * SERDES Table * LIODN setup * Portal configuration Signed-off-by: Kumar Gala <galak@kernel.crashing.org>