summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu/mpc85xx/p3041_ids.c
Commit message (Collapse)AuthorAgeLines
* net/fman: Support both new and legacy FMan CompatiblesIgal Liberman2015-09-01-1/+1
| | | | | | | | | | | | | | Recently the FMan Port and MAC compatibles were changed. This patch aligns the FMan Port and MAC compatibles to the new FMan device tree binding document. The FMan device tree binding document can be found in the Linux kernel: ./Documentation/devicetree/bindings/powerpc/fsl/fman.txt This patch doesn't affect legacy compatibles support. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Tested-by: Xing Lei <xing.lei@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/mpc85xx: use correct dma compatible for several SoCsTudor Laurentiu2014-12-05-2/+2
| | | | | | | | | | | | | | Newer qoriq socs have an updated dma ip block with a different compatible. Let's make sure we use the proper string so that the dmas get their liodn. In order to have the means to specify the compatible string, the liodn setting macros were updated to receive a new parameter for it. The following SoCs were changed to use the new compatible: T1023/4, T1040, T2080/1, T4240, B4860. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* powerpc/mpc85xx: Changed LIODN offset valuesCristian Sovaiala2013-05-02-10/+10
| | | | | | | | | | | Extending LIODN offset range from 1-5 to 1-10 While using a qman portal with a higher index the LIODN offset is incorrectly set, thus extending the range of offsets covers all 10 qman portals Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Acked-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNsTimur Tabi2012-08-08-4/+4
| | | | | | | | | | The SET_PCI_LIODN() macro takes a compatible property string as a parameter, so that it knows which PCI device tree node to look for. The calls to these macros are using a hard-coded string, but we already have the CONFIG_SYS_FSL_PCIE_COMPAT macro which contains the same string, so we should use that. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/85xx: Add support for RMan LIODN initializationKumar Gala2011-10-18-0/+14
| | | | | | | | | This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Update setting of SRIO LIODNsKumar Gala2011-10-18-0/+6
| | | | | | | | | | | Properly set the LIODN values associated with SRIO controller. On P4080/P3060 we have an LIODN per port and one for the RMU. On P2041/P3041/P5020 we have 2 LIODNs per port. Update the tables for all of these devices to properly handle both styles. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p3041: fixup portal config infoHaiying Wang2011-10-13-10/+10
| | | | | | | | | | | | | | P3041 has 10 qman portals, we need to configure all of them: * As there are only 4 physical cores sdest can only be 0 to 3 * We assign dqrr & frame data LIODNs for all portals so if they are utilized the proper mapping tables can be setup uniquely (PAMU stashing) * We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN assignments are tuned around an assumption of at most 5 partitions. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't setKumar Gala2011-07-11-4/+7
| | | | | | | | | | | Add ifdef protection for qp_info and liodn associated with Q/BMan. Also rearrange setting of _tbl_sz variables to utilize existing ifdef protection for things like FMAN. Also add protection around setup_portals() call in corenet_ds board code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix setting of LIODN prop in PCIe nodes on P3041/P5020Laurentiu TUDOR2011-04-04-5/+5
| | | | | | | | | | | | | We utilize the compatible string to find the node to add fsl,liodn property to. However P3041 & P5020 don't have "fsl,p4080-pcie" compatible for their PCIe controllers as they aren't backwards compatible. Allow the macro's to specify the PCIe compatible to use to allow SoC uniqueness. On P3041 & P5020 we utilize "fsl,qoriq-pcie-v2.2" for the PCIe controllers. Signed-off-by: Laurentiu TUDOR <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p3041: Add various p3041 specific informationKumar Gala2011-01-19-0/+105
Add P3041 SoC specific information: * SERDES Table * LIODN setup * Portal configuration Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-09-15 09:58:46 +0000