arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	powerpc/p5040ds: add per pci endpoint liodn offset list	Laurentiu Tudor	2012-10-22	-0/+52
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Add a new device tree property named "fsl,liodn-offset-list" holding a list of per pci endpoint permitted liodn offsets. This property is useful in virtualization scenarios that implement per pci endpoint partitioning. The final liodn of a partitioned pci endpoint is calculated by the hardware, by adding these offsets to pci controller's base liodn, stored in the "fsl,liodn" property of its node. The liodn offsets are interleaved to get better cache utilization. As an example, given 3 pci controllers, the following liodns are generated for the pci endpoints: pci0: 193 256 259 262 265 268 271 274 277 pci1: 194 257 260 263 266 269 272 275 278 pci2: 195 258 261 264 267 270 273 276 279 Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
*	powerpc/85xx: define SRIO LIODN functions only if SRIO is defined	Timur Tabi	2012-10-22	-0/+8
\| \| \| \| \| \| \| \|	The P5040 does not have SRIO support, so there are no SRIO LIODNs. Therefore, the functions that set the SRIO LIODNs should not be compiled. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
*	powerpc/85xx: Add support for RMan LIODN initialization	Kumar Gala	2011-10-18	-0/+39
\| \| \| \| \| \| \| \| \|	This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Update device tree handling for SRIO	Kumar Gala	2011-10-18	-0/+31
\| \| \| \| \| \| \| \| \| \| \|	Update device tree handling for SRIO controller to support updated fsl,srio device tree binding. We handle disabling of individual ports, the whole controller, RMU, and RMAN. Additionally, we setup the SRIO related LIODNs in the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Update setting of SRIO LIODNs	Kumar Gala	2011-10-18	-0/+18
\| \| \| \| \| \| \| \| \| \| \|	Properly set the LIODN values associated with SRIO controller. On P4080/P3060 we have an LIODN per port and one for the RMU. On P2041/P3041/P5020 we have 2 LIODNs per port. Update the tables for all of these devices to properly handle both styles. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Add support for setting up RAID engine liodns on P5020	Kumar Gala	2011-10-03	-1/+24
\| \| \| \| \| \| \| \| \|	Add support for Job Queue/Ring LIODN for the RAID Engine on P5020. Each Job Queue/Ring combo needs one id assigned for a total of 4 (2 JQs/2 Rings per JQ). This just handles RAID Engine in non-DPAA mode. Signed-off-by: Santosh Shukla <santosh.shukla@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
*	powerpc/85xx: Add support to initialize LIODN registers and portals	Kumar Gala	2010-07-26	-0/+187
	On the new QorIQ/CoreNet based platforms we need to initialize the "portals" as access into the Data Path subystem as well as Logical IO Device Numbers (LIODN) that are used for the IOMMU (PAMU). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>