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* mips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro defineWills Wang2016-05-31-0/+1
| | | | | | Add AR933X_PLL_SWITCH_CLOCK_CONTROL_REG define for ar933x chip. Signed-off-by: Wills Wang <wills.wang@live.com>
* mips: ath79: Rename get_bootstrap into ath79_get_bootstrapWills Wang2016-05-31-14/+1
| | | | | | | | Add a platform prefix for function name in order to make more readable, and move it into ath79.h Signed-off-by: Wills Wang <wills.wang@live.com> Acked-by: Marek Vasut <marex@denx.de>
* mips: ath79: ar933x: Fix ethernet PHY mismatchWills Wang2016-05-26-0/+1
| | | | | | | | We need reset the Ethernet Switch analog part before operation, or the build-in Ethernet PHY don't work. Signed-off-by: Wills Wang <wills.wang@live.com> Acked-by: Marek Vasut <marex@denx.de>
* mips: ath79: Add AR934x supportMarek Vasut2016-05-21-0/+46
| | | | | | | | | | Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Add support for ungating ethernet on ar933x and ar934xMarek Vasut2016-05-21-0/+2
| | | | | | | | Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Add support for ungating USB on ar933x and ar934xMarek Vasut2016-05-21-0/+2
| | | | | | | | Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Fix ar71xx_regs.h indentMarek Vasut2016-05-21-1034/+1069
| | | | | | | | | The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: add base support for QCA/Atheros ath79 SOCsWills Wang2016-05-21-0/+1354
This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
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