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* malta: IDE supportPaul Burton2015-01-29-0/+5
| | | | | | | | | This patch adds IDE support to the MIPS Malta board. The IDE controller is enabled after probing the PCI bus and otherwise just makes use of U-boot generic IDE support. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: avoid .set ISA for cache operationsPaul Burton2015-01-29-0/+13
| | | | | | | | | | | | As a step towards unifying the cache maintenance code for mips32 & mips64 CPUs, stop using ".set <ISA>" directives in the more developed mips32 version of the code. Instead, when present make use of the GCC builtin for emitting a cache instruction. When not present, simply don't bother with the .set directives since U-boot always builds with -march=mips32 or higher anyway. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: add support for pre-relocation mallocDaniel Schwierzeck2015-01-21-2/+0
| | | | | | | | | | | Implement MIPS specific setup of the gd_t structure to support pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified, a memory area will be reserved after the initial stack area and the gd->malloc_base pointer will be initialized. After this patch the new driver model can be used on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada2014-12-08-1/+1
| | | | | | Including <linux/compiler.h> is enough for general use. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* common/board_f: Initialized global data for generic boardYork Sun2014-05-12-0/+2
| | | | | | | | | | | | | Some platforms (tested on mpc85xx, mpc86xx) use global data before calling function baord_inti_f(). The data should not be cleared later. Any arch which uses global data in generic board board_init_f() should define CONFIG_SYS_GENERIC_GLOBAL_DATA. Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com> CC: Simon Glass <sjg@chromium.org> CC: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
* bd_info: remove bi_barudrate member from struct bd_infoMasahiro Yamada2014-05-12-1/+0
| | | | | | | | | | | | | | | | | gd->bd->bi_baudrate is a copy of gd->baudrate. Since baudrate is a common feature for all architectures, keep gd->baudrate only. It is true that bi_baudrate was passed to the kernel in that structure but it was a long time ago. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
* MIPS: drop incaip boardDaniel Schwierzeck2014-04-20-2432/+0
| | | | | | | | | This is dead hardware and no one is interested in making the necessary changes for upcoming features like generic board or driver model. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wolfgang Denk <wd@denx.de>
* MIPS: allow use of generic boardPaul Burton2014-04-20-0/+9
| | | | | | | | This patch allows MIPS boards to make use of generic board, replacing arch/mips/lib/board.c with common/board_{f,r}.c and struct bd_info with the asm-generic version. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* MIPS: fix types u64 and __u64 to unsigned long longDaniel Schwierzeck2014-03-04-20/+3
| | | | | | | | Linux MIPS uses asm-generic/int-ll64.h in asm/types.h. Thus u64 and __u64 are defined as unsigned long long. Port this over to U-Boot. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* malta: enable PIIX4 SERIRQPaul Burton2013-11-26-0/+7
| | | | | | | | | | | | | Whilst U-boot does not require this itself, Linux currently relies upon it having been muxed and enabled by the bootloader. Thus in order to preserve compatibility with current kernels before a fix is merged in Linux we will enable the SERIRQ interrupt and mux it to its pin. Without doing this current kernels will never receive serial port interrupts and the end result is typically that userland appears to hang. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: use unmapped flash base addressGabor Juhos2013-11-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The physical base address of the NOR flash is 0x1e000000 on the Malta boards. The hardware also maps the first 4MiB of the flash into the 0x1fc00000-0x1fffffff range. Currently, U-Boot uses the mapped address to access the flash, which does not work in recent qemu versions. Since commit a427338b222b43197c2776cbc996936df0302f51 (mips_malta: correct reading MIPS revision at 0x1fc00010) writing to the mapped address space causes a CPU exception. Due to the exception, U-Boot hangs during boot when it tries to detect the CFI flash chip. Use the correct physical address for the MALTA_FLASH_BASE constant to fix the problem. In order to avoid relocation problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE constants. The change makes it possible to start U-Boot on a Malta board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also works on older versions (tested with 1.1.1, 1.2.2, 1.4.2, 1.5.3). Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com>
* malta: arch/mips/include/asm/malta.h SPDX license tagPaul Burton2013-11-11-3/+2
| | | | | | | | This patch replaces the GPL-2.0 text with a GPL-2.0 SPDX-License-Identifier tag, and adds Imagination Technologies copyright following my recent changes. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: setup PIIX4 interrupt routePaul Burton2013-11-09-0/+5
| | | | | | | | | | | | Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will be left disabled. Linux does not set up this routing but relies upon it having been set up by the bootloader, reading back the IRQ lines which the PIRQ[A:D] signals have been routed to. This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11. This matches the setup used by YAMON. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: display "U-boot" on the LCD screenPaul Burton2013-11-09-0/+10
| | | | | | | Displaying a message on the LCD screen is a simple yet effective way to show the user that the board has booted successfully. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: support for coreFPGA6 boardsPaul Burton2013-11-09-6/+29
| | | | | | | | | | | | | | | | | | | | | This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* mips32: detect L1 cache sizes if they're not definedPaul Burton2013-11-09-0/+6
| | | | | | | | | | | | | | | | For boards such as the MIPS Malta with an FPGA core card it is desirable to be able to detect the L1 cache sizes at runtime, since they are not dependant upon the board but on the FPGA bitstream in use. This patch performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are not defined by the board configuration. In cases where the sizes are detected this patch also removes the restriction that the I-cache & D-cache line sizes must be the same, as this is not necessarily true. If the cache sizes are defined by a configuration then they will be hardcoded as before, so this patch will not add overhead to such boards. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* include: delete include/linux/config.hMasahiro Yamada2013-11-08-5/+0
| | | | | | | | | | | | Linux Kernel abolished include/linux/config.h long time ago. (around version v2.6.18..v2.6.19) We don't need to provide Linux copatibility any more. This commit deletes include/linux/config.h and fixes source files not to include this. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* cosmetic: remove empty lines at the top of fileMasahiro Yamada2013-11-08-1/+0
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* MIPS: bootm: add support for generic relocation of init ramdisksDaniel Schwierzeck2013-08-13-0/+1
| | | | | | | | All linux kernels after v2.6 require a page-aligned location of an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to support this with the generic U-Boot relocation code. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add support for LMBDaniel Schwierzeck2013-08-13-0/+2
| | | | | | | | This is required for init ramdisk relocation and device tree support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos2013-07-24-1/+3
| | | | | | | | | | | Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: enable flash supportGabor Juhos2013-07-24-0/+2
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: add reset supportGabor Juhos2013-07-24-0/+3
| | | | | | | | | | The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: qemu-malta: add support for emulated MIPS Malta boardGabor Juhos2013-07-24-0/+16
| | | | | | | | | | | | Add minimal support for the MIPS Malta CoreLV board emulated by Qemu. The only supported peripherial is the UART. This is enough to boot U-Boot to the command prompt both in little and big endian mode. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-103/+7
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* MIPS: asm/errno.h: switch to asm-generic/errno.hDaniel Schwierzeck2013-06-08-143/+1
| | | | | | | | | | This fixes several warnings like In file included from ./u-boot/include/linux/mtd/mtd.h:13:0, from env_onenand.c:37: ./u-boot/build/vct_platinumavc_onenand_small/include2/asm/errno.h:52:0: warning: "ENOMSG" redefined [enabled by default] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: fix __raw_* IO accessorsGabor Juhos2013-06-08-13/+13
| | | | | | | | | | | | | | The purpose of the __raw* IO accessors is to provide IO access in native-endian order. However in the current MIPS implementation, the 16 and 32 bit variants of the __raw accessors are swapping the values on big-endian systems if the CONFIG_SWAP_IO_SPACE option is enabled. The patch changes the IO accessor macros to fix this broken behaviour. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* Change stub example to use asm-generic/sections.hSimon Glass2013-03-15-2/+2
| | | | | | | We can use the declarations of __bss_start and _end from this header instead of declaring them locally. Signed-off-by: Simon Glass <sjg@chromium.org>
* Introduce generic link section.h symbol filesSimon Glass2013-03-15-0/+27
| | | | | | | | | | | | | | | | | | We create a separate header file for link symbols defined by the link scripts. It is helpful to have these all in one place and try to make them common across architectures. Since Linux already has a similar file, we bring this in even though many of the symbols there are not relevant to us. Each architecture has its own asm/sections.h where symbols specifc to that architecture can be added. For now everything except AVR32 just includes the generic header. One change is needed in arch/avr32/lib/board.c to make this conversion work. Reviewed-by: Tom Rini <trini@ti.com> (version 5) Signed-off-by: Simon Glass <sjg@chromium.org>
* MIPS: add dynamic relocation supportGabor Juhos2013-02-12-2/+0
| | | | | | | | | | | | | | | | | | | | | | The code handles relocation entries with the following relocation types only: mips32: R_MIPS_REL32 mips64: R_MIPS_REL+R_MIPS_64 xburst: R_MIPS_REL32 Other relocation entries are skipped without processing. The code must be extended if other relocation types must be supported. Add -pie to LDFLAGS_FINAL to generate the .rel.dyn fixup table, which will be applied to the relocated image before transferring control to it. The CONFIG_NEEDS_MANUAL_RELOC is not needed after the patch, so remove that as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: start.S: use symbol __image_copy_end for U-Boot image relocationDaniel Schwierzeck2013-02-12-3/+0
| | | | | | | | | Use the newly introduced symbol __image_copy_end as end address for relocation of U-Boot image. This is needed for dynamic relocation added in later patches. This patch obsoletes the symbols uboot_end and uboot_end_data which are removed. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: u-boot.lds: introduce symbol __image_copy_endDaniel Schwierzeck2013-02-12-0/+6
| | | | | | | This symbol is used in later patches as end address for relocation of the U-Boot image into RAM. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: u-boot.lds: merge all BSS sections and introduce symbols __bss_[start|end]Daniel Schwierzeck2013-02-12-0/+12
| | | | | | | These symbols are used in later patches for as addresses for clearing the BSS area in the relocated U-Boot image. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: xburst: fix broken access to global_dataDaniel Schwierzeck2013-02-12-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix access to global_data which is broken since commits: commit 035cbe99cd2fd4adf9d7fd95aeebb5f814e37eb9 Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:49:08 2012 +0000 mips: Move per_clk and dev_clk to arch_global_data Move these field into arch_global_data and tidy up. The other CONFIG_JZSOC fields are used by various architectures, so just remove the #ifdef bracketing for these. Signed-off-by: Simon Glass <sjg@chromium.org> commit 582601da2f90b1850aa19f7820b1623c79b3dac6 Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:48:35 2012 +0000 arm: Move lastinc to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> commit 66ee69234795c0596f84b25f06b7fbc2e8ed214c Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:48:34 2012 +0000 arm: Move tbl to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
* mips: Use generic global_dataSimon Glass2013-02-04-33/+1
| | | | | | Move mips over to use generic global_data. Signed-off-by: Simon Glass <sjg@chromium.org>
* mips: Move per_clk and dev_clk to arch_global_dataSimon Glass2013-02-04-4/+5
| | | | | | | | Move these field into arch_global_data and tidy up. The other CONFIG_JZSOC fields are used by various architectures, so just remove the #ifdef bracketing for these. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add architecture-specific global dataSimon Glass2013-02-01-0/+5
| | | | | | | | | | | | | We plan to move architecture-specific data into a separate structure so that we can make the rest of it common. As a first step, create struct arch_global_data to hold these fields. Initially it is empty. This patch applies to all archs at once. I can split it if this is really a pain. Signed-off-by: Simon Glass <sjg@chromium.org>
* MIPS: convert IO port accessor functions to 'static inline'Gabor Juhos2013-01-22-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The currently used 'extern inline' directive causes the following compiler warnings if CONFIG_SWAP_IO_SPACE is defined: <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc_p' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl_p' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc_p' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw_p' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc_p' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl_p' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc_p' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw_p' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw' which is not static [enabled by default] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: use inline directive for __in*s functionsGabor Juhos2013-01-22-1/+1
| | | | | | | | | All other IO accessor functions are using the 'inline' directive. Use that also for the __in*s to make it consistent with the other variants. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: constify address pointer in test_bit()Daniel Schwierzeck2012-12-08-1/+1
| | | | | | | | | | | | Fix several warnings when enabling UBIFS on MIPS: In file included from ubifs.h:2137:0, from ubifs.c:26: misc.h: In function 'ubifs_zn_dirty': misc.h:38:2: warning: passing argument 2 of 'test_bit' discards 'const' qualifier from pointer target type [enabled by default] ../include/asm/bitops.h:569:23: note: expected 'volatile void *' but argument is of type 'const long unsigned int *' Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* mips: Change global data baudrate to intSimon Glass2012-10-19-2/+2
| | | | | | | | | This doesn't need to be a long, so change it. Also adjust bi_baudrate to be unsigned. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
* MIPS: add support for 64 bit addressingZhi-zhou Zhang2012-10-16-1/+23
| | | | | | | | | Prepare for upcoming mips64 support. This patch add mips64 address support. Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com> [daniel.schwierzeck@gmail.com: prefer _MIPS_SZLONG in posix_types.h to fix some warnings] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: don't use camel-case styleZhi-zhou Zhang2012-10-16-42/+42
| | | | | | Replace camel-case style with upper-case style globally. Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
* global_data: unify global flag definesMike Frysinger2012-08-09-13/+1
| | | | | | | All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* MIPS: board.c: move extern declarations to u-boot-mips.hDaniel Schwierzeck2012-06-03-0/+11
| | | | | | This fixes some remaining checkpatch.pl warnings. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* net: punt bd->bi_ip_addrMike Frysinger2012-05-15-1/+0
| | | | | | | | | This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+36
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: Ingenic XBurst Jz4740 processor supportXiangfu Liu2011-10-10-0/+1161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jz4740 is a multimedia application processor targeting for mobile devices like e-Dictionary, eBook, portable media player (PMP) and GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core (JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture provides high integration, high performance and low power consumption. JzRISC incorporated in Jz4740 is the advanced and power-efficient 32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K D-Cache, and can operate at speeds up to 400 MHz. On-chip modules such as LCD controller, embedded audio codec, multi- channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich suite of peripherals for multimedia application. NAND controller (SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are also available. For more info about Ingenic XBurst Jz4740: http://en.ingenic.cn/eng/ http://www.linux-mips.org/wiki/Ingenic This patch introduces XBurst CPU support in U-Boot. It's compatible with MIPS32, but requires a bit different cache maintenance, timer routines, and boot mechanism using USB boot tool, so XBurst support can go into a separate new home, cpu/xburst/. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* image: push default arch values to arch headersMike Frysinger2011-10-05-0/+3
| | | | | | | | | This pushes the ugly duplicated arch ifdef lists we maintain in various image related files out to the arch headers themselves. Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* console: Implement pre-console bufferGraeme Russ2011-10-05-0/+3
| | | | | | | | | | | | | Allow redirection of console output prior to console initialisation to a temporary buffer. To enable this functionality, the board (or arch) must define: - CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer - CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer - CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes) The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes Any earlier characters are silently dropped.
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