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* | serial: Remove CONFIG_SERIAL_MULTI from remaining sourcesMarek Vasut2012-10-15-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove the parts depending either on disabled CONFIG_SERIAL_MULTI or ifdefs around CONFIG_SERIAL_MULTI parts since CONFIG_SERIAL_MULTI is now enabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de>
* | serial: mxs: spl: Remove empty serial_* functions from SPL codeMarek Vasut2012-10-15-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove the empty bodies from serial_* functions from MXS SPL code. These empty implementations are now in common/serial.c instead so declaring them also in the SPL code would cause a colision once serial multi is enabled unconditionally. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com> Cc: Stefano Babic <sbabic@denx.de>
* | ARM: prevent misaligned array initsAlbert ARIBAUD2012-10-15-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Under option -munaligned-access, gcc can perform local char or 16-bit array initializations using misaligned native accesses which will throw a data abort exception. Fix files where these array initializations were unneeded, and for files known to contain such initializations, enforce gcc option -mno-unaligned-access. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> [trini: Switch to usign call cc-option for -mno-unaligned-access as Albert had done previously as that's really correct] Signed-off-by: Tom Rini <trini@ti.com>
* | arm: armv7: omap3: Fix restore sequence in lowlevel_initAlbert ARIBAUD2012-10-08-5/+4
| | | | | | | | | | | | | | | | | | | | | | The restore sequence in lowlevel_init was in the wrong order, causing lr to lose its original value and be set equal to ip instead. Also, its use of the stack clashes with that of s_init, so move the s_init call after the restore and turn it into a tail-optimized branch. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | arm: rmobile: bugfix: wrong register saving in lowlevel_initTetsuyuki Kobayashi2012-10-08-11/+1
| | | | | | | | | | | | | | | | lowlevel_init() of rmobile badly assumed that ip register holds return address. The commit "63ee53a7 armv7 cpu_init_crit: Simplify code" breaks this assumption. This patch removes this bad assumption and simplify code. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* | arm: armv7: temporarily set -mno-unaligned-accessAlbert ARIBAUD2012-10-05-0/+2
| | | | | | | | | | | | | | | | | | This patch aims at ensuring that the 2012.10 release works out-of-the-box on as many targets as possible, by reinstating commit 5347560f5427bcdd48a563b62180481606ac8044, which adds option -mno-unaligned-access to armv7 builds. This patch will be overriden immediately after release of 2012.10.
* | ARM: Add Altera SOCFPGA Cyclone5Dinh Nguyen2012-10-04-0/+529
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
* | arm: Support new Xilinx Zynq platformMichal Simek2012-10-04-0/+232
| | | | | | | | | | | | | | | | | | Add timer driver. Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Joe Hershberger <joe.hershberger@gmail.com> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* | arm: Fixed the offset for the no relocation.Zhong Hongbo2012-10-04-0/+12
| | | | | | | | | | | | | | | | When the u-boot address of destination equal to __start, no relocation. relocation offset(r9) = 0. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Tested-by: Stefano Babic <sbabic@denx.de>
* | arm: Add CONFIG_OF_BOARD_SETUP support to bootmJoe Hershberger2012-10-04-0/+3
| | | | | | | | | | | | ARM boards need to change device tree settings as well Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | arm: Remove additional config flagsMichal Simek2012-10-04-10/+0
| | | | | | | | | | | | These options are just duplicated from arch/arm/cpu/armv7/config.mk Signed-off-by: Michal Simek <monstr@monstr.eu>
* | armv7 cpu_init_crit: Simplify codeBenoît Thébaudeau2012-10-04-4/+1
| | | | | | | | | | | | | | | | We don't need to return to cpu_init_crit after calling lowlevel_init, so lowlevel_init can directly return to the caller of cpu_init_crit. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | arm: work around assembler bugAllen Martin2012-10-04-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | Disable sibling call optimization based on binutils version. This is to work around a bug in the assember in binutils versions < 2.22. Branches to weak symbols can be incorrectly optimized in thumb mode to a short branch (b.n instruction) that won't reach when the symbol gets preempted. http://sourceware.org/bugzilla/show_bug.cgi?id=12532 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Tom Rini <trini@ti.com>
* | ARM: increase lmb stack space reservation to 4KBRob Herring2012-10-04-2/+2
| | | | | | | | | | | | | | | | | | | | The bootm initrd image copy to ram can collide with the stack in cases where the print buffer size is large (i.e. 1K). The result is intermittent initrd decompression errors depending on the initrd size MOD 4KB since the initrd start address is 4KB aligned. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | Merge remote-tracking branch 'u-boot-marvell/master'Albert ARIBAUD2012-10-03-9/+54
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| * | ARM: kirkwood/orion5x: Use reset_cpu definition in include/common.hDinh Nguyen2012-10-03-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | include/common.h has the reset_cpu defined already. No need to re-define here. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>
| * | kirkwood: implement kw_sdram_size_adjustGerlando Falauto2012-10-03-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Size of the SDRAM chips might differ between any two (otherwise identical) instances of the same board. So add a function kw_sdram_size_adjust() which reads out the current ram size for a given bank, and adjusts the Kirkwood's SDRAM window size register accordingly. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com>
| * | kirkwood: implement kw_sdram_bs_set()Gerlando Falauto2012-10-03-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards might be equipped with different SDRAM configurations. When that is the case, CPU CS Window Size Register (CS[0]n Size) should be set to the biggest value through board.cfg file; then its value can be fixed at runtime according to the detected SDRAM size. Therefore, implement kw_sdram_bs_set(). Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
| * | kirkwood: use c-struct for access to SDRAM addr decode registersHolger Brunck2012-10-03-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the defines and do this with a C-struct. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>
| * | kirkwood: fix mpp.h coding styleLuka Perkov2012-10-03-1/+1
| | | | | | | | | | | | Signed-off-by: Luka Perkov <uboot@lukaperkov.net>
* | | ARM : Add GPIO Driver and IOMUX definition for S3C2440Gabriel Huau2012-10-03-0/+371
|/ / | | | | | | | | | | | | It's now possible to use the gpio driver interface for s3c2440. This patch add iomux definitions too. Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
* | rmobile: Fix build timer driver with BUILD_DIRNobuhiro Iwamatsu2012-10-03-2/+8
| | | | | | | | | | | | | | | | | | | | Rmobile common timer driver diverts the same driver as SH architecture. When it builds at the same place with source, it is no problem, but when it builds out of source, it cannot build. This patch revises this problem. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | arm: rmobile: Add cpu_eth_init functionNobuhiro Iwamatsu2012-10-03-0/+37
| | | | | | | | | | | | | | This supports ethernet driver of RMOBILE R8A7740. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add support for ATMARK-TECHNO Armadillo-800EVA boardHideyuki Sano2012-10-03-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM, Ethernet, and more. This patch supports the following functions: - 512MB DDR3-SDRAM - Serial console (SCIF) - Ethernet MAC(MII) & PHY(SMSC) Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add support PFC of Renesas R8A7740Nobuhiro Iwamatsu2012-10-03-1/+3200
| | | | | | | | | | | | | | | | | | Renesas R8A7740 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add support Renesas R8A7740Nobuhiro Iwamatsu2012-10-03-0/+363
| | | | | | | | | | | | | | | | | | Renesas R8A7740 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add support TMU base timer functionNobuhiro Iwamatsu2012-10-03-1/+2
| | | | | | | | | | | | | | Some rmobile SoC has TMU base timer function. This supports TMU. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Change initializing ICCICR registerNobuhiro Iwamatsu2012-10-03-0/+3
| | | | | | | | | | | | | | | | There is rmobile without ICCICR. ICCICR is initialized only when ICCICR is defined. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: kzm9g: separate cpu_rev to integer and fractionTetsuyuki Kobayashi2012-10-03-9/+30
| | | | | | | | | | | | | | | | | | | | According to SoC document, revision info is separated to integer part and fracton part. So I separete rmobile_get_cpu_rev() to rmobile_get_cpu_rev_integer() and rmobile_get_cpu_rev_fraction(). Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: kzm9g: fix CPU infoTetsuyuki Kobayashi2012-10-03-4/+4
| | | | | | | | | | | | | | CPU info register was read wrongly by mistake. And function rmobile_get_cpu_rev() was not called properly. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdtTetsuyuki Kobayashi2012-10-03-0/+2
| | | | | | | | | | | | | | | | Add dummy member to struct sh73a0_rwdt in sh73a0.h. Without this, initializing watch dog timer goes wrong. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Support build with gcc-4.6 or laterNobuhiro Iwamatsu2012-10-03-1/+27
| | | | | | | | | | | | | | | | | | | | | | Latest rmobile code was tested by using old gcc (gcc-4.4). When we use gcc-4.6 (or later), the build is made, but does not work. This solves a problem not to work by add -march=armv5 to compiple option when we built in gcc-4.6 (or later). I tested by linaro's compiler version 2012.04-20120426. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: kzm9g: enable reset commandTetsuyuki Kobayashi2012-10-03-0/+4
| | | | | | | | | | | | | | Do soft power on reset in U-Boot reset command. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: kzm9g: Adjust low level hardware settingTetsuyuki Kobayashi2012-10-03-1/+3
| | | | | | | | | | | | | | Adjust low level hardware setting in s_init. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add supoprt for KMC KZM-A9-GT boardNobuhiro Iwamatsu2012-10-03-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 512MB DDR2-SDRAM - 16MB NOR Flash memory - Serial console (SCIF) - Ethernet (SMSC) - I2C Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add support PFC of Renesas SH73A0Nobuhiro Iwamatsu2012-10-03-0/+2817
| | | | | | | | | | | | | | | | Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add support Renesas SH73A0Nobuhiro Iwamatsu2012-10-03-24/+1067
| | | | | | | | | | | | | | | | Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | arm: rmobile: Add basic support for Renesas R-MobileNobuhiro Iwamatsu2012-10-03-0/+227
| | | | | | | | | | | | | | | | This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | ARMv7: Add register definition of global timerNobuhiro Iwamatsu2012-10-03-0/+36
| | | | | | | | | | | | | | ARMv7 has global timer. This provides the register definition of this timer. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XXJoel A Fernandes2012-10-01-2/+4
| | | | | | | | | | | | | | | | | | | | | | U-boot should not ignore getting the bootmode passed on from the bootrom. With this, U-boot SPL knows it was loaded from MMC1 and use this info to read full U-boot from MMC1 as well. Cc: pprakash@ti.com Cc: trini@ti.com Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* | OMAP: networking support for SPLIlya Yanok2012-10-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for networking in SPL. Some devices are capable of loading SPL via network so it makes sense to load the main U-Boot binary via network too. This patch tries to use existing network code as much as possible. Unfortunately, it depends on environment which in turn depends on other code so SPL size is increased significantly. No effort was done to decouple network code and environment so far. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@ti.com>
* | Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2012-09-30-70236/+587
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| * Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2012-09-27-69488/+0
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| | * dm: net: Move IXP NPE to drivers/net/Marek Vasut2012-09-24-69488/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * | ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini2012-09-27-41/+83
| | | | | | | | | | | | | | | | | | | | | | | | - Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: NAND: Move arch/arm/cpu/armv7/omap-common/spl_nand.c to common/splTom Rini2012-09-27-108/+0
| | | | | | | | | | | | | | | | | | | | | We move the spl_nand_load_image function to common/spl. This will allow for easier integration of SPL-boots-Linux code on other arches. Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linuxTom Rini2012-09-27-11/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as weak as some platforms may need to perform additional initalization at this point. We provide a gd that we know will be in a usable location, once the BSS has been cleared to help with this as well. Finally, we no longer call relocate_code so remove that from the armv7 version. Next, both board_init_f and jump_to_image_linux are going to be inherently arch-specific, so move these versions to arch/arm/lib/spl.c Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: Move the omap SPL framework to common/splTom Rini2012-09-27-489/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series. We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Move gpmc_init() to spl_board_init()Tom Rini2012-09-27-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | This is an OMAP/related-specific function, move calling it to spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that enabled NAND and didn't enable this already. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Start hooking in the current SPI SPL supportTom Rini2012-09-27-0/+8
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
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