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* tegra: Add support for UART init in cpu board.cSimon Glass2011-12-24-0/+81
| | | | | | | | | | We add a way of initialising the selected of UARTs prior to relocation. Boards can use the board_init_uart_f() instead of repeating this code themselves. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add a function mux featureSimon Glass2011-12-24-1/+100
| | | | | | | | | | | | funcmux permits selection of config options for particular peripherals, such as the pins that are used for that peripheral, if there are several options. Add UART selection to start with. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add clock_ll_start_uart() to enable UART prior to relocSimon Glass2011-12-24-0/+25
| | | | | | | | | | Most boards will want to enable a UART early. This function provides that feature in Tegra architecture code so the code does not need to be copied on every board. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move clock_early_init() to arch_cpu_init()Simon Glass2011-12-24-0/+3
| | | | | | | | | The clock init is not board specific, so move it into the cpu code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move cpu_init_cp15() to arch_cpu_init()Simon Glass2011-12-24-0/+4
| | | | | | | | | This call is more of an architecture requirement than a board one, so move it there. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-24-0/+27
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Always build with USE_PRIVATE_LIBGCC=yes.Thierry Reding2011-12-24-0/+2
| | | | | | | | | | The AVP on Tegra2 doesn't boot properly when U-Boot is linked against the GCC provided libgcc. To work around this, always build and link against a private libgcc for Tegra2-based boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Implement SPI / UART GPIO switchSimon Glass2011-12-24-0/+46
| | | | | | | | | | | | | | | | The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-24-0/+77
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arm, davinci: Fix build warnings for cam_enc_4xxChristian Riesch2011-12-24-2/+3
| | | | | | | | | | | | This patch fixes a build warning for the cam_enc_4xx board introduced by commit d6ec0c0dfc70447cf615ae80a952da81f73f16b4: spl.c:35:13: warning: 'gdata' defined but not used spl.c:36:13: warning: 'bdata' defined but not used Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* arm, davinci: Add SPL support for DA850 SoCsChristian Riesch2011-12-24-2/+35
| | | | | | | | | | This code adds an SPL for booting from SPI flash on DA850 SoCs. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
* arm: Tegra: fix undefined instruction hang immediately after resetTom Warren2011-12-21-0/+2
| | | | | | | | | | | commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't execute on Tegra, due to the AVP (ARM7TDI) not having a CP15. Result was an undefined instruction hang just after reset. Signed-off-by: Tom Warren <twarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Aneesh V <aneesh@ti.com>
* arm, fdt: update ethernet mac address before booting LinuxHeiko Schocher2011-12-19-0/+2
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Gerald van Baren <gvb.uboot@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de>
* add print_cpuinfo to s3c24x0David Müller (ELSOFT AG)2011-12-19-0/+55
| | | | | | | | | | | | Hello This patch adds support for "print_cpuinfo" on Samsung s3c24x0 based targets. If activated by "#define CONFIG_DISPLAY_CPUINFO", the chip ID and the 3 main cpu frequencies will be displayed. Dave Signed-off-by: David Müller <d.mueller@elsoft.ch>
* omap4_panda: Initialize the USB phyChris Lalancette2011-12-19-0/+63
| | | | | | | | | | During misc_init_r, make sure to setup the clocks properly for the USB hub on the pandaboard. With this in place, the USB hub and the ethernet works on the pandaboard. Signed-off-by: Chris Lalancette <clalancette@gmail.com> Acked-by: Aneesh V <aneesh@ti.com>
* davinci: Fixed wrong timebase clock frequency.Manfred Rudigier2011-12-19-1/+1
| | | | Signed-off-by: Manfred Rudigier <manfred.rudigier@omicron.at>
* arm926ejs: remove noop flush_dcache_all functionIlya Yanok2011-12-19-5/+0
| | | | | | | | | | | | | | | | Commit 2f3427c added noop cache functions implementation for arm926ejs to fix compilation of drivers depending on these functions (DaVinci EMAC in particular). Unfortunately, the bug was introduced: noop implementation calls dcache_disable which calls flush_dcache_all which in turn calls dcache_disable thus creating an infinite loop. This patch removes noop implementation for flush_dcache_all, we already have default one in arch/arm/lib/cache.c and it should be used instead. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Tested-by: Matthias Weisser <weisserm@arcor.de>
* Coding Style cleanupWolfgang Denk2011-12-19-1/+0
| | | | | | | Fix trailing white space, indentation by spaces instead of TABs, excessive blank lines, trailing blank lines. Signed-off-by: Wolfgang Denk <wd@denx.de>
* usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal)Lukasz Majewski2011-12-16-0/+1
| | | | | | | | | | This commit enables support for USB Gadgets on the Exynos4210 (C210 Universal) reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> CC: Remy Bohmer <linux@bohmer.net>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2011-12-12-7/+93
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: USB: efikamx: Enable USB on EfikaMX and EfikaSB USB: Add generic ULPI layer and a viewport USB: EHCI: Allow EHCI post-powerup configuration in board files USB: mx51evk: add end enable USB host support on port 1 USB: mx53loco: add end enable USB host support on port 1 USB: MX5: Add MX5 usb post-init callback USB: MX5: Abstract out mx51 USB pixmux configuration USB: MX5: add generic USB EHCI support for mx51 and mx53 USB: MX5: add helper functions to enable USB clocks usb:gadget:s5p Enable the USB Gadget framework at GONI usb:gadget:s5p USB Device Controller (UDC) implementation ehci: speed up initialization usb: add help for missing start subcommand cosmetic: remove excess whitespace from usb command help usb: align usb_endpoint_descriptor to 16-bit boundary usbtty: init endpoints prior to startup events pxa: convert pxa27x_udc to use read and write functions pxa: activate the first usb host port on pxa27x by default pxa: fix usb host register mismatch ehci-fsl: correct size of ehci caplength USB: Add usb_event_poll() to get keyboards working with EHCI USB: gadaget: add Marvell controller support USB: Fix complaints about strict aliasing in OHCI-HCD USB: Drop dead code from usb_kbd.c USB: Rework usb_kbd.c USB: Add functionality to poll the USB keyboard via control EP
| * USB: MX5: add helper functions to enable USB clocksWolfgang Grandegger2011-12-11-0/+80
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com> V2: Fix spacing in crm_regs.h
| * usb:gadget:s5p Enable the USB Gadget framework at GONILukasz Majewski2011-12-11-0/+4
| | | | | | | | | | | | | | | | | | | | This commit enables support for USB Gadgets on the GONI reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Remy Bohmer <linux@bohmer.net>
| * pxa: convert pxa27x_udc to use read and write functionsStefan Herbrechtsmeier2011-12-11-4/+4
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
| * pxa: activate the first usb host port on pxa27x by defaultStefan Herbrechtsmeier2011-12-11-2/+2
| | | | | | | | | | | | | | | | The pxa27x has 3 usb host ports. Activate all by default. Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
| * pxa: fix usb host register mismatchStefan Herbrechtsmeier2011-12-11-1/+3
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* | arm: add __aeabi_unwind_cpp_pr1() function to avoid linker complaintsWolfgang Grandegger2011-12-11-0/+4
|/ | | | | | | | | | | | | | | | | | With the ELDK 5.1 (beta) "armv7a" toolchain I'm get the following build failure: $ ./MAKEALL mx51evk ... /opt/eldk-5.1/armv7a/sysroots/arm-linux-gnueabi/usr/lib/arm-linux- gnueabi/4.6.1/libgcc.a(bpabi.o):(.ARM.exidx+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' make: *** [u-boot] Error 1 This patch fixes the issue similar to commit d442b6e7ad6a86e2fd0e6297291fe8872ff26fc6 but I don't know if it's general enough or if it does harm when using other toolchains. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* arm, davinci: Use lldiv for the 64-bit divisions in timer.cChristian Riesch2011-12-10-2/+4
| | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* M28: Cleanup memsize.o OOT buildMarek Vasut2011-12-09-23/+9
| | | | | | | | | | | | | | | | The current way memsize.c is built just made a symlink into the directory with SPL and then compiled it like any other file there. This was bad as that broke the out-of-tree build. The new way introduced in this patch uses the standard spl/Makefile methods (CONFIG_SPL_LIBCOMMON_SUPPORT / CONFIG_SPL_LIBGENERIC_SUPPORT) to let files in common/ be built. Because common/Makefile says memsize.c is always built (SPL and non-SPL build), this fixes our issue with memsize.c out-of-tree build. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28Marek Vasut2011-12-09-0/+1617
| | | | | | | | | | This moves SPL to common location so it can be reused by multiple boards. Also, this commit adjusts M28 SoM to avoid breakage due to the move. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.mx: add the initial support for freescale i.MX6Q processorJason Liu2011-12-09-0/+3628
| | | | | | | | i.MX6Q is freescale quad core processors with ARM cortex_a9 complex. This patch is to add the initial support for this processor. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de>
* i.mx: introduce the armv7/imx-common folderJason Liu2011-12-09-86/+165
| | | | | | | | | | | | | | | | | In order to support the coming MX6 platform and to reducde the duplicated code, we had better move some common files or functions to the imx-common folder for sharing. This patch does the following: - move speed.c file from armv7/mx5/speed.c to armv7/imx-common/speed.c - move armv7/mx5/timer.c to armv7/imx-common/timer.c, no any new feature added but just fix the checkpatch errors in the old file and remove the CONFIG_SYS_MX5_CLK32 reference in the file - create one new file cpu.c file to store the common function with i.mx5/6 Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* S5PC2XX: Rename S5pc2XX to exynosChander Kashyap2011-12-09-72/+72
| | | | | | | | | | | | | | As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* tegra2: Don't use board pointer before it is set upSimon Glass2011-12-09-9/+1
| | | | | | | | | | In board_init_f() the gd->bd pointer is not valid when dram_init() is called. This only avoids dying because DRAM is at zero on Tegra2. The common ARM routine sets up the banks in the same way anyway, so we can just remove this code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Remove unneeded 'dynamic ram size' messageSimon Glass2011-12-09-3/+1
| | | | | | | | | | | | | | | | | | | | | | | This message is not required, since it is followed by an 'official' U-Boot message. U-Boot 2011.03-00048-gd7cb0d3 (May 11 2011 - 17:17:23) TEGRA2 Board: NVIDIA Seaboard dynamic ram_size = 1073741824 DRAM: 1 GiB becomes: TEGRA2 Board: NVIDIA Seaboard DRAM: 1 GiB This is a separate commit since it changes behavior. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Remove unneeded boot codeSimon Glass2011-12-09-147/+1
| | | | | | | | Since we have cache support built in we can remove Tegra's existing cache initialization code amd other related dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Move CP15 init out of cpu_init_crit()Simon Glass2011-12-09-6/+21
| | | | | | | | | | | | | | | | | | | | Some SOCs have do not start up with their 'main' CPU. The first U-Boot code may then be executed with a CPU which does not have a CP15, or not a useful one. Here we split the initialization of CP15 into a separate call, which can be performed later if required. Once the main CPU is running, you should call cpu_init_cp15() to perform this init as early as possible. Existing ARMv7 boards which define CONFIG_SKIP_LOWLEVEL_INIT should not need to change, this CP15 init is still skipped in that case. The only impact for these boards is that the cpu_init_cp15() will be available even if it is never used on these boards. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Simplify tegra_start() boot pathSimon Glass2011-12-09-25/+37
| | | | | | | | | | | | | | | | | The Tegra2 boot path is more complicated than it needs to be. Since we want to move to building most of U-Boot with ARMv7 and only a small part with ARMv4T (for AVP) it should be as simple as possible. This makes tegra2_start() into a simple function which either does AVP init or A9 init depending on which core is running it. Both cores now following the same init path, beginning at _start, and the special Tegra2 boot path code is no longer required. Only two files need to be built for ARMv4T, and this is handled in the Tegra2 CPU Makefile. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add arch_cpu_init() to fire up Cortex-A9Simon Glass2011-12-09-0/+21
| | | | | | | | | | | | | We want to move away from a special Tegra2 start-up, and just use arch_cpu_init() instead. However, if we run board_init_f() from boot we need to build it for ARMv4T, since the Tegra's AVP start-up CPU does not support ARMv7. The effect of this is to do the AVP init earlier, and in arch_cpu_init(), rather that board_early_init_f(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Fix warnings in arch/arm/cpu/arm920t/s3c24x0/usb_ohci.cSimon Glass2011-12-09-8/+12
| | | | | | | | | | | | | | | | | Sorry if this is already fixed somewhere - I could not find it. This fixes these warnings: usb_ohci.c: In function 'submit_control_msg': usb_ohci.c:1081: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1081: note: initialized from here usb_ohci.c:1084: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1084: note: initialized from here usb_ohci.c:1087: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1087: note: initialized from here Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warningsAnatolij Gustschin2011-12-06-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Fix: clocks.c: In function 'setup_post_dividers': clocks.c:175: warning: comparison is always true due to limited range of data type clocks.c:177: warning: comparison is always true due to limited range of data type clocks.c:179: warning: comparison is always true due to limited range of data type clocks.c:181: warning: comparison is always true due to limited range of data type clocks.c:183: warning: comparison is always true due to limited range of data type clocks.c:185: warning: comparison is always true due to limited range of data type clocks.c:187: warning: comparison is always true due to limited range of data type clocks.c:189: warning: comparison is always true due to limited range of data type Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com>
* arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warningsAnatolij Gustschin2011-12-06-5/+3
| | | | | | | | | | | | | | | | Fix: clocks-common.c: In function 'setup_dplls': clocks-common.c:256:6: warning: variable 'sysclk_ind' set but not used [-Wunused-but-set-variable] clocks-common.c: In function 'setup_non_essential_dplls': clocks-common.c:292:6: warning: variable 'sysclk_ind' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Tom Rini <trini@ti.com>
* arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warningsAnatolij Gustschin2011-12-06-2/+3
| | | | | | | | | | | | | | Fix: spl.c: In function 'jump_to_image_no_args': spl.c:103: warning: assignment makes pointer from integer without a cast spl.c:105: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Tom Rini <trini@ti.com>
* MX: serial_mxc: cleanup removing nasty #ifdefStefano Babic2011-12-06-19/+21
| | | | | | | | | | | | | | | | | | The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* MXS: Add static annotations to dma driverMarek Vasut2011-12-06-25/+0
| | | | | | | | | | | Some functions were internal to the apbh dma driver, so annotate them static. Some of the functions weren't used at all so drop them. This makes the U-Boot binary smaller by about 1500 bytes. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx5: Correct a warning in clock.cSimon Glass2011-12-06-1/+1
| | | | | | | | | | | | | This corects the warning below, obtained with my gcc 4.6 compiler. arch/arm/cpu/armv7/mx5/libmx5.o: In function `decode_pll': arch/arm/cpu/armv7/mx5/clock.c:94: undefined reference to `__aeabi_uldivmod' I am not able to test this on MX5x hardware, but it does improve the MAKEALL output for me. You may already have a similar patch, but I cannot see it on the list. Signed-off-by: Simon Glass <sjg@chromium.org>
* OMAP3: Add SPL_BOARD_INIT hookTom Rini2011-12-06-0/+13
| | | | | | | | Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c. OMAP4 doesn't need i2c enabled in SPL. Enable SPL_BOARD_INIT on devkit8000. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to omap3_evmTom Rini2011-12-06-0/+26
| | | | | | | Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>. This also changes CONFIG_SYS_TEXT_BASE to 0x80100000. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to BeagleboardTom Rini2011-12-06-0/+29
| | | | | | | | | | | | | | | | | | This introduces 200MHz Micron parts timing information based on x-loader to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init logic is also based on what x-loader does in these cases. Note that while previously u-boot would be flashed in with SW ECC in this case it now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000. Cc: Dirk Behme <dirk.behme@gmail.com> Beagleboard rev C5, xM rev A: Tested-by: Tom Rini <trini@ti.com> Beagleboard xM rev C: Tested-by: Matt Ranostay <mranostay@gmail.com> Beagleboard rev B7, C2, xM rev B: Tested-by: Matt Porter <mporter@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Add identify_nand_chip functionTom Rini2011-12-06-0/+91
| | | | | | | | | | A number of boards are populated with a PoP chip for both DDR and NAND memory. Other boards may simply use this as an easy way to identify board revs. So we provide a function that can be called early to reset the NAND chip and return the result of NAND_CMD_READID. All of this code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Rework memory initalization and devkit8000 supportTom Rini2011-12-06-39/+17
| | | | | | | | | This changes to making the board be responsible for providing the memory initialization timings in SPL and converts the devkit8000 to this framework. In SPL we try and initialize both CS0 and CS1. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
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