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| * | | | ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernelMichal Simek2015-07-28-13/+715
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Syncup with the latest DT from the Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add reference to bus nodeMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For adding OCM memory in platform DTS is necessary to have reference to amba bus. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add pinctrl nodeMichal Simek2015-07-28-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Cleanup address-cells and size-cellsMichal Simek2015-07-28-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded address-cells form intc node because it is already setup in parent node. Add missing address-cells and size-cells to eth node to be shared for every platform DTSes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Clean up timer device tree nodesMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Separate IRQ cells from each other for easier reading. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Use the zynq binding with macbMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new zynq binding for macb ethernet, since it will disable half duplex gigabit like the Zynq TRM says to do. Also allow the compatible cadence gem binding that won't disable half duplex but works otherwise. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Fix GEM register area sizeMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of the GEM's register area is only 0x1000 bytes. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | spi: Fix zynq SPI bindingMichal Simek2015-07-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq is using Cadence IP where binding is documented in the Linux kernel and there is no reason to use different binding. Synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Remove 222 MHz OPPMichal Simek2015-07-28-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Migrate UART to Cadence bindingMichal Simek2015-07-28-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq UART is Cadence IP and the driver has been renamed accordingly. Migrate the DT to use the new binding for the UART driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add a fixed regulator for CPU voltageMichal Simek2015-07-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To silence the warning cpufreq_cpu0: failed to get cpu0 regulator: -19 from the cpufreq driver regarding a missing regulator, add a fixed regulator to the DT. Zynq does not support voltage scaling and the CPU rail should always be supplied with 1 V, hence it is added in the SOC-level dtsi. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Add missing nodes to DTSIMichal Simek2015-07-28-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ADC, CAN, GPIO, MC, DMA, DEVCFG, USB, Watchdog IPs to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | ARM: zynq: DT: Use the right names for nodesMichal Simek2015-07-28-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on SPEC you right names with addresses. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Add support for IP detection via SLCRMichal Simek2015-07-28-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SLCR can be used for IP configuration setting. Add SLCR skeleton to enable run time checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: mp: Simplify set_r5_start handlingMichal Simek2015-07-28-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass directly boot_addr which is LOVEC (0) or HIVEC (0xffff0000). No reason to use magic values 0 and 1. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Define ep config for ZynqMPSiva Durga Prasad Paladugu2015-07-28-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynqmp: Kconfig: Move zynqmp KconfigSiva Durga Prasad Paladugu2015-07-28-1/+17
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the zynqmp Kconfig from board to arch as there may be different boards under same architecture. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | stm32f4: add cpu clock option for 180 MHzAntonio Borneo2015-07-27-10/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While most stm32f4 run at 168 MHz, stm32f429 can work till 180 MHz. Add option to select 180 MHz through macro CONFIG_SYS_CLK_FREQ. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> To: Albert Aribaud <albert.u.boot@aribaud.net> To: Tom Rini <trini@konsulko.com> To: Kamil Lulko <rev13@wp.pl> Cc: u-boot@lists.denx.de
* | | | stm32f429: pass the device unique ID in DTBAntonio Borneo2015-07-27-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read device unique ID and set environment variable "serial#". Value would then be passed to kernel through DTB. To read ID from DTB, kernel is required to have commit: 3f599875e5202986b350618a617527ab441bf206 (ARM: 8355/1: arch: Show the serial number from devicetree in cpuinfo) This commit is already mainline since v4.1-rc1. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> To: Albert Aribaud <albert.u.boot@aribaud.net> To: Tom Rini <trini@konsulko.com> To: Kamil Lulko <rev13@wp.pl> Cc: u-boot@lists.denx.de
* | | | Kill unneeded #include <linux/kconfig.h>Masahiro Yamada2015-07-27-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the top-level Makefile forces all the source files to include include/linux/kconfig.h (see the UBOOTINCLUDE define), these includes are redundant. By the way, there are exceptions for the statement above; host programs. In fact, host tools in U-Boot depend on a particular board configuration, although I think they should not. So, some files still include <linux/config.h> to work around build errors on host tools. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | | am33xx: Unused get_board_rev function removalPaul Kocialkowski2015-07-27-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All am33xx device tree are using device-tree, so get_board_rev is never actually called. Thus, we can get rid of it to make the code easier to maintain. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | omap3: CONFIG_REVISION_TAG ifdef check for get_board_revPaul Kocialkowski2015-07-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Despite being defined with __weak, this declaration of get_board_rev will conflict with the fallback one when ONFIG_REVISION_TAG is not defined. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | omap5: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP5, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap4: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP4, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap3: Definitions for SYS_BOOT-based fallback boot device selectionPaul Kocialkowski2015-07-27-1/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap-common: SYS_BOOT-based fallback boot device selection for peripheral bootPaul Kocialkowski2015-07-27-7/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP devices might boot from peripheral devices, such as UART or USB. When that happens, the U-Boot SPL tries to boot the next stage (complete U-Boot) from that peripheral device, but in most cases, this is not a valid boot device. This introduces a fallback option that reads the SYS_BOOT pins, that are used by the bootrom to determine which device to boot from. It is intended for the SYS_BOOT value to be interpreted in the memory-preferred scheme, so that the U-Boot SPL can load the next stage from a valid location. Practically, this options allows loading the U-Boot SPL through USB and have it load the next stage according to the memory device selected by SYS_BOOT instead of stalling. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap-common: Boot device define instead of hardcoded valuePaul Kocialkowski2015-07-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that SPL boot devices are clearly defined, we can use BOOT_DEVICE_QSPI_4 instead of a hardcoded value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap: SPL boot devices cleanup and completionPaul Kocialkowski2015-07-27-67/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleans up the SPL boot devices for omap platforms and introduces support for missing boot devices. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | omap-common: Common boot code OMAP3 support and cleanupPaul Kocialkowski2015-07-27-166/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces OMAP3 support for the common omap boot code, as well as a major cleanup of the common omap boot code. First, the omap_boot_parameters structure becomes platform-specific, since its definition differs a bit across omap platforms. The offsets are removed as well since it is U-Boot's coding style to use structures for mapping such kind of data (in the sense that it is similar to registers). It is correct to assume that romcode structure encoding is the same as U-Boot, given the description of these structures in the TRMs. The original address provided by the bootrom is passed to the U-Boot binary instead of a duplicate of the structure stored in global data. This allows to have only the relevant (boot device and mode) information stored in global data. It is also expected that the address where the bootrom stores that information is not overridden by the U-Boot SPL or U-Boot. The save_omap_boot_params is expected to handle all special cases where the data provided by the bootrom cannot be used as-is, so that spl_boot_device and spl_boot_mode only return the data from global data. All of this is only relevant when the U-Boot SPL is used. In cases it is not, save_boot_params should fallback to its weak (or board-specific) definition. save_omap_boot_params should not be called in that context either. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | | | keystone2: add wfi in to the core_spin loopVitaly Andrianov2015-07-27-2/+7
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | When core A turning of core B, via tetris DPSC it places the core B DPSC into transitional state. The core B has to execute wfi instruction to move its DPSC to the OFF state. This patch add such instruction. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-07-25-29/+116
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| * | | sunxi: ga10h: Enable both otg and regular usb host controllersHans de Goede2015-07-25-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows using devices plugged into both ports of the tablet. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: musb: Stop treating not having a vbus-det gpio as an errorHans de Goede2015-07-25-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some boards the otg is wired up in host-only mode in this case we have no vbus-det gpio. Stop logging an error from sunxi_usb_phy_vbus_detect() in this case, and stop treating sunxi_usb_phy_vbus_detect() returning a negative errno, as if a charger is plugged into the otg port. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: musb: Use device-model for musb host modeHans de Goede2015-07-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the sunxi musb glue to use the device-model for musb host mode. This allows using musb in host mode together with other host drivers such as ehci / ohci, which is esp. useful on boards which use the musb controller in host-only mode, these boards have e.g. an usb-a receptacle or an usb to sata converter attached to the musb controller. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: musb: Move musb config and platdata to the sunxi-musb glueHans de Goede2015-07-25-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the musb config and platdata to the sunxi-musb glue, which is where it really belongs. This is preparation patch for adding device-model support for the sunxi-musb-host code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb-phy: Add support for reading otg id pin valueHans de Goede2015-07-25-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for reading the id pin value of the otg connector to the usb phy code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: Enable CMD_USB and USB_STORAGE by default on sunxiHans de Goede2015-07-25-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start using the new Kconfig options which are available for these now, and simply always enable them by selecting them as sunxi builds always include USB support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sunxi: Update selects in arch/arm/Kconfig for DM conversionsTom Rini2015-07-25-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With certain features being convert to DM now we want sunxi to default to having DM enabled for ETH/SERIAL and USB in some cases. Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Rini <trini@konsulko.com> [hdegoede@redhat.com: Also select CONFIG_USB for all sunxi builds] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | sunxi: Remove bogus uart entry from utoo-p66 dts fileHans de Goede2015-07-25-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At one point in time the utoo-p66 dts file in the kernel had a bogus uart entry, and it seems like we synced with the kernel at just the wrong moment. This commit removes the bogus uart entry, which breaks booting the utoo-p66 when DM_SERIAL=y. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: spl: Detect at runtime where SPL was read fromDaniel Kochmański2015-07-24-12/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make possible using a single `u-boot-sunxi-with-spl.bin` binary for both NAND memory and SD card. Detection where SPL was read from is implemented in `spl_boot_device`. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Some small coding style fixes] Acked-by: Hans De Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | | sunxi: Create helper function veryfing valid boot signature on MMCDaniel Kochmański2015-07-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | | Merge git://git.denx.de/u-boot-usbTom Rini2015-07-24-1/+10
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| * | | | usb: gadget: bcm_udc_otg filesJiandong Zheng2015-07-22-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required files for the Broadcom UDC OTG interface. Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
| * | | | usb: Fastboot function config for better consistency with other functionsPaul Kocialkowski2015-07-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB download gadget functions such as thor and dfu have a separate config option for the USB gadget part of the code, independent from the command part. This switches the fastboot USB gadget to the same scheme, for better consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
| * | | | include: usb: Move USB controller base address mappingNikhil Badola2015-07-22-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move USB controller Base address mapping from ls102xa immap to fsl xhci header. This is required to remove any warnings when controller base addresses are mapped for multiple platforms in their respective files. Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
| * | | | arch: arm: fsl: Add XHCI support for LS1021ARamneek Mehresh2015-07-22-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add base register address information for USB XHCI controller on LS1021A Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* | | | | arm: mvebu: Add SPL SDIO/MMC boot supportStefan Roese2015-07-24-1/+12
| |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since I don't know of a way to test the boot-device upon runtime, this patch hardcodes the spl_boot_device instead. Tested on Marvell DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
* | | | Merge git://git.denx.de/u-boot-uniphierTom Rini2015-07-23-11/+446
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| * | | | ARM: dts: UniPhier: add I2C ch4 device node for PH1-sLD3Masahiro Yamada2015-07-23-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This I2C device is used SoC-internally for controlling the DMD core. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | | ARM: UniPhier: add PH1-sLD3 SoC supportMasahiro Yamada2015-07-23-10/+436
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-10-22 11:45:35 +0000