summaryrefslogtreecommitdiff
path: root/arch/arm
Commit message (Collapse)AuthorAgeLines
...
| * | ahci-plat: Provide a weak scsi_init hookIan Campbell2014-03-10-0/+6
| | | | | | | | | | | | | | | | | | This allow the platform to register the platform ahci device. Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
| * | kbuild: move "checkthumb" to ARM archprepareMasahiro Yamada2014-03-07-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "checkthumb" makes sense only for ARM architecture. Move it to arch/arm/config.mk. To make sure gcc supports THUMB mode before beginning build, run "checkthumb" during "archprepare". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCCMasahiro Yamada2014-03-07-66/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding "CONFIG_" prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes" in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2014-03-04-442/+15
| |\ \
| | * | mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-77/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-88/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers ↵pekon gupta2014-03-04-194/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into common omap_gpmc.h Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related defines and declarations scattered in SoC platform specific header files like include/asm/arch-xx/cpu.h However, GPMC hardware remains same across all platforms thus this patch merges GPMC data scattered across different arch-xx specific header files into single header file include/asm/arch/omap_gpmc.h Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | mtd: nand: omap: remove unused #defines from common omap_gpmc.hpekon gupta2014-03-04-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI params or nand_id[] table. And based on that it defines ECC layout. This patch 1) removes following board configs used for defining NAND ECC layout - GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND) - GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND) - GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND) - GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND) 2) removes unused #defines in common omap_gpmc.h depending on above configs Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | mtd: nand: omap: remove redundant platform specific header: arch-xx/omap_gpmc.hpekon gupta2014-03-04-86/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are two sets of omap_gpmc.h header files (a) arch/arm/include/asm/omap_gpmc.h common header file for all platforms, containing defines and declarations used by GPMC NAND driver. (b) arch/arm/include/asm/arch-xx/omap_gpmc.h SoC platform specific header file containing defines like ECC layout. This patch removes platform specific arch-xx/omap_gpmc.c because: - GPMC hardware engine is common for all SoC platforms hence only (a) is enough - ECC layout is now defined in omap_nand.c driver itself based on ecc-scheme selected. Hence all ECC layout declarations in (b) are redundant. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | mtd: nand: omap: optimize chip->ecc.hwctl() for H/W ECC schemespekon gupta2014-03-03-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip->ecc.hwctl() is used for preparing the H/W controller before read/write NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.) Though all ECC schemes in OMAP NAND driver use GPMC controller for generating ECC syndrome (for both Read/Write accesses). But but in current code HAM1_ECC and BCHx_ECC schemes implement individual function to achieve this. This patch (1) removes omap_hwecc_init() and omap_hwecc_init_bch() as chip->ecc.hwctl will re-initializeGPMC before every read/write call. omap_hwecc_init_bch() -> omap_enable_ecc_bch() (2) merges the GPMC configuration code for all ECC schemes into single omap_enable_hwecc(), thus adding scalability for future ECC schemes. omap_enable_hwecc() + omap_enable_ecc_bch() -> omap_enable_hwecc() Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | | kbuild: fix CROSS_COMPILE settings in config.mkMasahiro Yamada2014-03-04-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The syntax CROSS_COMIPLE ?= <cross_compiler_prefix> does not work because config.mk is parsed after exporting CROSS_COMPILE. Like Linux Kernel's arch/$(ARCH)/Makefile, we must write as follows: ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := <cross_compiler_prefix> endif Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | kbuild: consolidate PLATFORM_LIBSMasahiro Yamada2014-03-04-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had switched to Kbuild so now we can specify PLATFORM_LIBS/PLATFORM_LIBGCC with relative path. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * | | sizes.h - consolidate for all architecturesAlexey Brodkin2014-03-04-47/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Stefan Roese <sr@denx.de> [trini: Add bcm Kona platforms to the patch] Signed-off-by: Tom Rini <trini@ti.com>
| * | | mmc: zynq: Add OF initialization supportMichal Simek2014-03-04-0/+1
| |/ / | | | | | | | | | | | | | | | Enable initialize sdhci from DTB. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Revert "arm: mxs: Add support for generating signed BootStream"Stefano Babic2014-04-04-87/+0
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 53e6b14e037c9f72e6d03244c32d8d597e2e0234. Patch does not merge anymore with u-boot-arm and must be rebased. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | mx6: add example DTB for mx6qsabreautoStefano Babic2014-04-02-0/+14
| | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
* | | imx: add rules for U-Boot DTB supportStefano Babic2014-04-02-0/+12
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | mxs: fix warning in SPL with console supportStefano Babic2014-04-02-0/+2
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | arm: mxs: Add serial console support into SPLMarek Vasut2014-04-01-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for serial console into the i.MX23/i.MX28 SPL. A full, uncrippled serial console support comes very helpful when debugging various spectacular hardware bringup issues early in the process. Because we do not use SPL framework, but have our own minimalistic SPL, which is compatible with the i.MX23/i.MX28 BootROM, we do not use preloader_console_init(), but instead use a similar function to start the console. Nonetheless, to avoid blowing up the size of the SPL binary, this support is enabled only if CONFIG_SPL_SERIAL_SUPPORT is defined, which is disabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | arm: mxs: Properly set GD pointer in SPLMarek Vasut2014-04-01-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Set the GD pointer in the SPL to a defined symbol so various functions from U-Boot can be used without adverse side effects. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | arm: mxs: Add support for generating signed BootStreamMarek Vasut2014-03-31-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the groundwork for generating signed BootStream, which can be used by the HAB library in i.MX28. We are adding a new target, u-boot-signed.sb , since the process for generating regular non-signed BootStream is much easier. Moreover, the signed bootstream depends on external _proprietary_ _binary-only_ tool from Freescale called 'cst', which is available only under NDA. To make things even uglier, the CST or HAB mandates a kind-of circular dependency. The problem is, unlike the regular IVT, which is generated by mxsimage, the IVT for signed boot must be generated by hand here due to special demands of the CST. The U-Boot binary (or SPL binary) and IVT are then signed by the CST as a one block. But here is the problem. The size of the entire image (U-Boot, IVT, CST blocks) must be appended at the end of IVT. But the size of the entire image is not known until the CST has finished signing the U-Boot and IVT. We solve this by expecting the CST block to be always 3904B (which it is in case two files, U-Boot and the hand-made IVT, are signed in the CST block). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | arm: mxs: Adjust the load address of U-Boot and SPL for HABMarek Vasut2014-03-31-9/+24
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using HAB, there are additional special requirements on the placement of U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the U-Boot binary a little further from the begining of the DRAM, so the HAB CST and IVT can be placed in front of the U-Boot binary. This is necessary, since both the U-Boot and the IVT must be contained in single CST signature. To make things worse, the IVT must be concatenated with one more entry at it's end, that is the length of the entire CST signature, IVT and U-Boot binary in memory. By placing the blocks in this order -- CST, IVT, U-Boot, we can easily align them all and then produce the length field as needed. As for the SPL, on i.MX23/i.MX28, the SPL size is limited to 32 KiB, thus we place the IVT at 0x8000 offset, CST right past IVT and claim the size is correct. The HAB library accepts this setup. Finally, to make sure the vectoring in SPL still works even after moving the SPL from 0x0 to 0x1000, we add a small function which copies the vectoring code and tables to 0x0. This is fine, since the vectoring code is position independent. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ARM: AM43xx: Change DDR3 Reset ValueDave Gerlach2014-03-04-1/+1
| | | | | | | | | | | | | | | | | | The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value of the ddr reset value for DDR3 before the EMIF takes over. We must have this bit set high so that on exit from DeepSleep0 within the kernel the reset line has the proper value. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* | ARM: AM43xx: Write sdram_config to secure_emif_sdram_configDave Gerlach2014-03-04-0/+1
| | | | | | | | | | | | | | | | | | The register secure_emif_sdram_config in control module is copied to the EMIF sdram_config register when it is coming out of DeepSleep0 in order to ensure that the EMIF comes up for the correct type of DDR. Without this, resume can hang from within the kernel. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* | ARM: AM43xx: EMIF: configure self-refresh entry delayDave Gerlach2014-03-04-2/+2
| | | | | | | | | | | | | | | | | | | | Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the desired delay in cycles that the EMIF waits without an access to enter self-refresh, in this case 8192 cycles. With this, code desiring to enter self refresh only has to toggle one bit to enable it. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* | ARM: AM43xx: clocks: Enable CPGMAC clock controlMugunthan V N2014-03-04-0/+1
|/ | | | | | Enable CPGMAC clock control for AM43xx to use ethernet in U-Boot Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-344/+1967
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * arm: Switch to -mno-unaligned-access when supported by the compilerTom Rini2014-02-26-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unaligned accesses being allowed and fast at the hardware level. We set this bit and must pass along -mno-unaligned-access so that the compiler will still breakdown accesses and not trigger a data abort. To better help understand the requirements of the project with respect to unaligned memory access, the Documentation/unaligned-memory-access.txt file has been added as doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1 tag of the kernel. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
| * arm: remove unneeded symbol offsets and _TEXT_BASEAlbert ARIBAUD2014-02-26-310/+7
| | | | | | | | | | | | | | | | Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * arm: make _end compiler-generatedAlbert ARIBAUD2014-02-26-16/+65
| | | | | | | | | | | | | | | | | | This prevents references to _end from generating absolute relocation records. This change is binary invariant for ARM targets. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-24-11/+54
| |\
| | * ti814x: Fix illegal use of FP ops in clock_ti814x.cMåns Rullgård2014-02-21-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The function pll_sigma_delta_val uses "float" data which is not correct. The exact "why" of this mangling is lost to history, but this changes us to equivalent non-FP math to get the same results. Reported-by: Wolfgang Denk <wd@denx.de> Acked-by: Matt Porter <mporter@linaro.org>
| | * DRA7: fix ABB efuse offset for OPP_NOMNishanth Menon2014-02-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 194dd74ad919e57026f385aaab7f89acf7ea79ef (DRA7: add ABB setup for MPU voltage domain) Made an offset typo error by using 0x4A003B24 as the efuse offset for OPP_NOM. As per TI documentation, 0x4A003B24 is for OPP_OD, and 0x4A003B20 is for OPP_NOM. Fix the same. Reported-by: Praveen Rao <prao@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
| | * ARM: OMAP4: fix DDR timings for OMAP4430 ES2.0Janne Grunau2014-02-21-0/+18
| | | | | | | | | | | | | | | | | | | | | DDR timings were broken since 47abc3df701d8bc26f311350aa523fc1d0f8ad4e for PandaBoard EA1. Signed-off-by: Janne Grunau <j@jannau.net>
| | * ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator controlDave Gerlach2014-02-21-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Schematic indicates GPIO5_7 is to be used for VTT regulator control rather than GPIO0_21 so modify enable_vtt_regulator to reflect this. Without this some boards will experience DDR3 corruption and fail to boot. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [trini: Rework patch against mainline] Signed-off-by: Tom Rini <trini@ti.com>
| | * Add support for B&R KWB MotherboardHannes Petermaier2014-02-21-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: trini@ti.com
| | * am335x: Initial support for Silica Pengwyn boardLothar Felten2014-02-21-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the Silica Pengwyn board [1] The board is based on a TI AM3354 CPU [2] All jumpers removed it will boot from the SDcard, the console is on UART1 accessible via the FDTI -> USB. The on board NAND flash is supported and can act as boot medium, depending on jumper settings. USB Host, USB Device and Ethernet are also provided but untested. [1] http://www.silica.com/product/silica-pengwyn-board.html [2] http://www.ti.com/product/am3354 Signed-off-by: Lothar Felten <lothar.felten@gmail.com> [trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused spi0_pin_mux from Pengwyn support] Signed-off-by: Tom Rini <trini@ti.com>
| * | arch: bcm281xx: Initial commit of bcm281xx architecture codeDarwin Rambo2014-02-22-0/+1734
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add bcm281xx architecture support code including a clock framework and chip reset. Define register block base addresses for the bcm281xx architecture and create an empty gpio header file required when CONFIG_CMD_GPIO is set. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
| * | arch: kona: Initial commit of kona-common architecture codeDarwin Rambo2014-02-22-0/+100
| |/ | | | | | | | | | | | | | | | | The Kona architecture is present on a number of Broadcom mobile SoCs including the bcm281xx family of chips. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
* | arm: omap: delete unincluded omap-common/config.mkMasahiro Yamada2014-02-25-9/+0
| | | | | | | | | | | | | | | | | | | | | | arch/arm/cpu/armv7/omap-common/config.mk is never included because "omap-common" is not SoC name. If we want to add OMAP-specific compiler flags, they must be added to omap3/config.mk, omap4/config.mk, omap5/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | kbuild: refactor more IMX image rulesMasahiro Yamada2014-02-25-30/+10
| | | | | | | | | | | | | | | | | | This commit avoids generating ./SPL twice. - Fist time descending to spl/ - Second time as a prerequisite of u-boot-with-spl.imx, u-boot-with-nand-spl.imx. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: use shorten logs for IMX imagesMasahiro Yamada2014-02-25-37/+54
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: use shorten logs for mkimage rulesMasahiro Yamada2014-02-25-5/+5
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: rename OBJCFLAGS to OBJCOPYFLAGSMasahiro Yamada2014-02-25-5/+5
| | | | | | | | | | | | | | Rename OBJCFLAGS to OBJCOPYFLAGS beforehand to use "cmd_objcopy" in scripts/Makefile.lib in an upcoming commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | arm: delete unused macro CONFIG_ARCH_DEVICE_TREEMasahiro Yamada2014-02-24-10/+0
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Rajeshwari Birje <rajeshwari.s@samsung.com> Cc: Inderpal Singh <inderpal.singh@linaro.org>
* | common: Add get_effective_memsize() to memsize.cYork Sun2014-02-21-1/+1
| | | | | | | | | | | | | | | | | | This function has been around for powerpc. It is used for systems with memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory, this feature can limit U-boot to one block without going over the limit. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-02-21-8/+14
|\ \
| * | am43xx: Add qspi supportSourav Poddar2014-02-18-1/+5
| | | | | | | | | | | | | | | | | | | | | Add QSPI definitions and clock configuration support. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | spi: mxc_spi: i.MX6 DL/S have only 4 eCSPI controllerMarkus Niebel2014-02-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The dual lite and solo variant have only 4 SPI controller. respect this in the MXC_SPI_BASE_ADRESSES macro Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | spi: spi-mxc: add defines for clk inactive state for ECSPIMarkus Niebel2014-02-18-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Provide define for the SCLK_CTL field of the config reg of ECSPI. While at it, oder the defines to improve readability and make adding more defines easier. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
generated by cgit v1.1 at 2024-10-10 18:22:31 +0000