summaryrefslogtreecommitdiff
path: root/arch/arm
Commit message (Collapse)AuthorAgeLines
* arm, davinci: add DAVINCI_MMC_CLKIDHeiko Schocher2011-11-15-0/+1
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: da850/dm365 lowlevel cleanupHeiko Schocher2011-11-15-125/+113
| | | | | | | | | | | | | | | | - Cleanup a lot of fix values, and use defines instead. - Also make some values configurable through the board config file. - delete the NAND_SPL code for da850, as it is not used actually - remove the asm code Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4/5: Add support for booting with CH.Sricharan2011-11-15-57/+226
| | | | | | | | | | | | | | | | Configuration header(CH) is 512 byte header attached to an OMAP boot image that will help ROM code to initialize clocks, SDRAM etc and copy U-Boot directly into SDRAM. CH can help us in by-passing SPL and directly boot U-boot, hence it's an alternative for SPL. However, we intend to support both CH and SPL for OMAP4/5. Initialization done through CH is limited and is not equivalent to that done by SPL. So U-Boot has to distinguish between the two cases and handle them accordingly. This patch takes care of doing this. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap5: emif: Add emif/ddr configurations required for omap5 evmSricharan2011-11-15-1234/+1549
| | | | | | | | | | | | | Add the emif configurations required for omap5 soc.Add the correct ddr part configurations required for omap5 evm board. EDB8164B3PH from ELPIDA is the part used on the board. Also changes are done to retain some part of the code common for OMAP4/5 and keep only the remaining in the Soc specific directories. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap5: clocks: Add clocks support for omap5 platform.Sricharan2011-11-15-474/+1735
| | | | | | | | | | | | Adding the correct configurations required for dplls, clocks, for omap5 Soc. Also changes are done to retain some part of the code common for OMAP4/5 and move only the remaining to the Soc specific directories. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap5: Add minimal support for omap5430.Sricharan2011-11-15-346/+1567
| | | | | | | | | | | | | | | | This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: Checkpatch fixesSricharan2011-11-15-18/+4
| | | | | | | | | Fixing them here so that when the files are reused in subsequent patches for omap5, avoids new checkpatch warnings. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: make omap4 code common for future reuseSricharan2011-11-15-9/+16
| | | | | | | | | Much of omap4 soc support code can be reused for omap5. Move them to the omap-common directory to facilitate this. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* PXA: Cleanup serial_pxaMarek Vasut2011-11-15-111/+109
| | | | | | | | | | * Cleanup register definitions by introducing new regs-uart.h, compliant with rest of U-Boot. * Remove old register definitions from pxa-regs.h * Convert serial_pxa to new regs-uart.h * Cleanup serial_pxa Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* mx31: Fix checkpatch warnings in generic.cFabio Estevam2011-11-11-2/+2
| | | | | | | Fix checkpatch warnings in generic.c. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx31: Use proper IO accessor for GPR registerFabio Estevam2011-11-11-3/+9
| | | | | | | Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx31: Remove duplicate definition for GPR registerFabio Estevam2011-11-11-4/+2
| | | | | | | GPR register definition is already available at imx-regs.h, so remove the duplication. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* iMX28: Add USB and USB PHY register definitionsMarek Vasut2011-11-11-0/+329
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Remy Bohmer <linux@bohmer.net>
* iMX28: Fix ARM vector handlingMarek Vasut2011-11-11-0/+22
| | | | | | | | | | | | | | | This patch introduces proper ARM vector handling for i.MX28 CPU. This issue wasn't addressed because the interrupts weren't enabled on any ARMv5 core, therefore the issue wasn't noticed earlier. In previous implementation, the vectoring code used by i.MX28 CPU when an exception happened was that of the SPL. With this change, the branch target when an exception happens can be reconfigured by U-Boot. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* iMX28: Add APBH DMA driverMarek Vasut2011-11-11-0/+637
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* iMX28: Add GPIO controlMarek Vasut2011-11-11-0/+38
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* iMX28: Add PINMUX controlMarek Vasut2011-11-11-1/+815
| | | | | | | | | | | | | | | Taken from Linux kernel with minor modifications: commit bf985969e27b507f734435a99df8bf745a3dbb2b Author: Shawn Guo <shawn.guo@freescale.com> Date: Mon Dec 20 22:57:43 2010 +0800 ARM: mxs: Add iomux support Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* iMX28: Add SSP MMC driverMarek Vasut2011-11-11-0/+2
| | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Acked-by: Andy Fleming <afleming@gmail.com>
* iMX28: Initial support for iMX28 CPUMarek Vasut2011-11-11-0/+4526
| | | | | | | | | | | | This patch supports: - Timers - Debug UART - Clock Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* SPL: Allow ARM926EJS to avoid compiling in the CPU support codeMarek Vasut2011-11-08-0/+6
| | | | | | | | | | This allows the SPL to avoid compiling in the CPU support code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Scott Wood <scottwood@freescale.com>
* arm: a320: fix broken timerPo-Yu Chuang2011-11-08-84/+50
| | | | | | | | | | | | | | | | | timer.c used static data and are called before relocation. Move all static variables into global_data structure. Also cleanup timer.c from unused stubs and make it truly use 64 bit tick values. Remove reset_timer_masked() get_timer_masked() reference: arch/arm/cpu/arm926ejs/at91/timer.c Based on Reinhard Meyer <u-boot@emk-elektronik.de>'s patches 5dca710a3d7703e41da0e9894f2d71f9e25bea6b cfff263f41e32c7ba2ee9162a8cc6423eb5a8390 Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Tested-by: Macpaul Lin <macpaul@gmail.com>
* arm, davinci: Fix setting of the SDRAM configuration registerChristian Riesch2011-11-08-6/+19
| | | | | | | | | | | | | | | da850_ddr_setup() expects the BOOTUNLOCK bit to be set in If BOOTUNLOCK is not set in this define, several configuration bits will not be writeable and the code will not work. Since the BOOTUNLOCK and TIMUNLOCK bits are not configuration options but access control bits, this patch changes the code to work irrespective of the value of these bits in CONFIG_SYS_DA850_DDR2_SDBCR. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Remove the duplication of LPSC functionsChristian Riesch2011-11-08-92/+4
| | | | | | | | | | | | | | The LPSC functions defined in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c are replaced by those already defined in arch/arm/cpu/arm926ejs/davinci/psc.c. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Rename AM1808 lowlevel functions to DA850Christian Riesch2011-11-08-82/+82
| | | | | | | | | | | | | | | Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c and da850_lowlevel.h since they apply not only to the AM1808 SoC but to all DA850 chips. The function names and #defines are changed likewise. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* da8xxevm: fix build errorPrabhakar Lad2011-11-08-0/+1
| | | | | | | | | | | | | | | | | | This patch fixes following compile error for da8xx evm da830evm.c: In function 'board_init': da830evm.c:222: error: 'DAVINCI_SYSCFG_SUSPSRC_UART2' undeclared (first use in this function) da830evm.c:222: error: (Each undeclared identifier is reported only once da830evm.c:222: error: for each function it appears in.) make[2]: *** [da830evm.o] Error 1 similarly for da850evm. introduced through commit: f9fc237f1f07d4e5ff7c9c2da39cabc8d3d7b339 Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* mx53: Turn off child clocks before reconfigure perclk_rootFabio Estevam2011-11-04-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | In addition to ensuring that PERCLK remains at least 2.5 times slower than the AHB clock, certain steps need to be followed to ensure robust operation of PERCLK when reconfiguring the PERCLK clock source. To properly configure the PERCLK clock source, the following steps are required: 1.In the CCGR registers, gate the clocks to all PERCLK-dependent modules. 2.Select the desired input clock for the PERCLK root clock (to be either source from the peripherals main source clock or the lp_apm clock source). Refer to the CMCBR register, perclk_lp_apm_sel bit. 3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers to the desired setting. Refer to the CBCDR register for details. 4.In the CCGR registers, enable the desired clocks for the PERCLK-dependent module clocks. If these steps aren't followed, GPT timer may stop and the kernel stops at "Calibrating delay loop". Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* omap3: mem: Move comments next to definitionsSanjeev Premi2011-11-04-76/+35
| | | | | | | | | | | | | Calculations for ACTIM_CTRLA amd ACTIM_CTRLB values are defined in 'header' style comments. Moved them along with definitions. Should help maintain consistency between comments and code if any of these are tweaked in future. Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: mem: Clean-up whitespacesSanjeev Premi2011-11-04-26/+26
| | | | | | | | | Consistent use of TABs and align definitions with neighbouring code. Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: mem: Define and use common macrosSanjeev Premi2011-11-04-24/+62
| | | | | | | | | | | | | Define common macros to arrive at the values of registers SDRC_ACTIM_CTRLA and SDRC_ACTIM_CTRLB for different memory types. This doesn't make any real change in the execution but helps readability. Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* VIDEO: davinci: add framebuffer to da8xxStefano Babic2011-11-03-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | | The patch is a port from the framebuffer driver of the Linux driver drivers/video/da8xx-fb.c, used on davinci da8xx and OMAP-L138 boards. As base for the port, the following commit (last changes for this driver at the moment in the Linux kernel tree) was taken: commit 1db41e032d563eb47deab40dc5595be306b143ba Author: axel lin <axel.lin@gmail.com> Date: Tue Feb 22 01:52:42 2011 +0000 video: da8xx-fb: fix section mismatch warning Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: Davinci: added missing registers to hardware.hStefano Babic2011-11-03-1/+3
| | | | | | | | | The hardware base address for ther LCD configuration registers is missing, as well as some syscfg registers. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for ↵Bastian Ruppert2011-11-03-0/+4
| | | | | | | | | | console Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: dzu@denx.de CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Davinci: ea20: set console on UART0Bastian Ruppert2011-11-03-1/+1
| | | | | | | Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm926ejs, davinci: add missing spi defines for dm365Heiko Schocher2011-11-03-0/+3
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm926ejs, davinci: add cpuinfo for dm365Heiko Schocher2011-11-03-2/+29
| | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: add lowlevel function for dm365 socHeiko Schocher2011-11-03-0/+480
| | | | | | | | | | used for booting (for example) from NAND using spl code. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: add header files for dm365Heiko Schocher2011-11-03-0/+294
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: add support for new spl frameworkHeiko Schocher2011-11-03-1/+92
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap/spl: actually enable the consoleIlya Yanok2011-11-03-0/+2
| | | | | | | | | Currently OMAP SPL code does all the initialization but does not set the gd->have_console value so no output is actually performed. This patch sets gd->have_console to 1. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, arm926: fix missing symbols in NAND_SPL modeHeiko Schocher2011-11-03-0/+6
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Add function lpsc_syncreset()Christian Riesch2011-11-03-5/+17
| | | | | | | | | | | | | This patch adds a function lpsc_syncreset that allows setting a lpsc module into Sync Reset state. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* armada100: define CONFIG_SYS_CACHELINE_SIZELei Wen2011-11-03-0/+2
| | | | | | | By default, on Armada100 SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen <leiwen@marvell.com>
* pantheon: define CONFIG_SYS_CACHELINE_SIZELei Wen2011-11-03-0/+2
| | | | | | | By default, on Pantheon SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen <leiwen@marvell.com>
* kirkwood: define CONFIG_SYS_CACHELINE_SIZEMichael Walle2011-11-03-1/+2
| | | | | | | | | | By default, on Kirkwood SoC DCache Lnd ICache line lengths are 32 bytes long Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* kirkwood: drop empty asm-offsets.s fileMike Frysinger2011-11-03-0/+0
| | | | | | | This generated file does not belong in the tree -> punt. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* am335x: Drop board_sysinfo structTom Rini2011-11-03-7/+0
| | | | | | This isn't used presumably should be a typedef if needed later. Signed-off-by: Tom Rini <trini@ti.com>
* mx31: add ESD control registersHelmut Raiger2011-11-03-0/+13
| | | | | | | | This allows to initialize DDR memory in C code. Currently all mx31 boards use assembler code (lowlevel_init.S) Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* mx31: define pins and init for UART2 and CSPI3Helmut Raiger2011-11-03-0/+32
| | | | | Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* mx31: Introduce mx31_set_gpr functionFabio Estevam2011-11-03-0/+54
| | | | | | | | | | Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31. This function can be useful for setting a group of pins into tied to some specific peripherals. Reuse this function from the linux kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX35: Drop unnecessary prototypes from imx-regs.hStefano Babic2011-11-03-4/+0
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
generated by cgit v1.1 at 2024-11-20 09:49:51 +0000