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* sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3Siarhei Siamashka2015-11-22-3/+10
| | | | | | | | | | | | | | | | | | | | | The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz on Allwinner H3 and using PLL6 as the clock source (PLL6/3). This can be verified by reading the value of the AHB1_APB1_CFG_REG register via /dev/mem. It always reads as 0x3180 regardless of the current cpufreq operating point. So this configuration should be safe for use in U-Boot too. PLL6 also needs to be configured before it is used as the clock source, according to the "CCU / Programming Guidelines" section of the Allwinner manual. The current low AHB1 clock speed is limiting the USB transfer speed when booting via FEL. This patch can increase the FEL USB transfer speed from ~510 KB/s to ~950 KB/s. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add H3 DRAM initialization supportJens Kuske2015-11-22-0/+660
| | | | | | | | Based on existing A23/A33 code and the original H3 boot0. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add basic H3 supportJens Kuske2015-11-22-0/+7
| | | | | | | | Add initial sun8i H3 support, only uart + mmc are supported for now. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* dm: cros_ec: Convert cros_ec keyboard driver to driver modelSimon Glass2015-11-19-0/+1
| | | | | | | | Adjust the cros_ec keyboard driver to support driver model. Make this the default for all Exynos boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: tegra: Convert keyboard driver to driver modelSimon Glass2015-11-19-0/+1
| | | | | | | | Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-11-19-0/+3
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| * ARM: am43xx: Enable QUAD read and EDMA support for ti_qspiVignesh R2015-11-17-0/+3
| | | | | | | | | | | | | | | | | | Enable TI_EDMA3 and QUAD read support for ti_qspi on am43xx, this increases read performance to 4 MB/s. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | zynqmp: mp: Add support for booting R5 from any addressMichal Simek2015-11-19-3/+35
| | | | | | | | | | | | | | Put jump trampoline to TCM at 0 and setup R5 reset address to 0. Jump trampoline ensures that jump to the right location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | spl: mmc: add support for BOOT_DEVICE_MMC2Nikita Kiryanov2015-11-18-9/+1
| | | | | | | | | | | | | | | | | | | | | | Currently the mmc device that SPL looks at is always mmc0, regardless of the BOOT_DEVICE_MMCx value. This forces some boards to implement hacks in order to boot from other mmc devices. Make SPL take into account the correct mmc device. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl: change return values of spl_*_load_image()Nikita Kiryanov2015-11-18-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make spl_*_load_image() functions return a value instead of hanging if a problem is encountered. This enables main spl code to make the decision whether to hang or not, thus preparing it to support alternative boot devices. Some boot devices (namely nand and spi) do not hang on error. Instead, they return normally and SPL proceeds to boot the contents of the load address. This is considered a bug and is rectified by hanging on error for these devices as well. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans De Goede <hdegoede@redhat.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | board: ti: beagle_x15: Rename to indicate support for TI am57xx evmsKipisz, Steven2015-11-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BeagleBoard X15 (http://beagleboard.org/x15) support in u-boot does actually support two different platform configuration offered by TI. In addition to BeagleBoard X15, it also supports the TMDXEVM5728 (or more commonly known as AM5728-evm). Information about the TI AM57xx EVM can be found here http://www.ti.com/tool/tmdxevm5728 The EVM configuration is 1-1 compatible with BeagleBoard X15 with the additional support for mPCIe, mSATA, LCD, touchscreen, Camera, push button and TI's wlink8 offering. Hence, we rename the beagle_x15 directory to am57xx to support TI EVMs that use the AM57xx processor. By doing this we have common code reuse. This sets the stage to have a common u-boot image solution for multiple TI EVMs such as that already done for am335x and am437x. This sets the stage for upcoming multiple TI EVMs that share the same code base. NOTE: Commit eae7ae185335 ("am437x: Add am57xx_evm_defconfig using CONFIG_DM") introduced DT support for beagle_x15 under am57xx_evm platform name. However, this ignored the potential confusion arising for users as a result. To prevent this, existing beagle_x15_defconfig is renamed as am57xx_evm_nodt_defconfig to denote that this is the "non device tree" configuration for the same platform. We still retain am57xx-beagle-x15.dts at this point, since we just require the common minimum dts. As a result of this change, users should expect changes in build procedures('make am57xx_evm_nodt_defconfig' instead of 'make beagle_x15_defconfig'). Hopefully, this would be a one-time change. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm: mvebu: a38x: serdes specification cleanupKevin Smith2015-11-17-52/+48
| | | | | | | | | | | | | | | | | | | | | | | | Instead of allocating space in the driver for the serdes specification table, just allow the board file to set a pointer to it. Also, allow the board to only specify the lanes that are used instead of including unused lanes. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | arm: mvebu: a38x: Add const to some function callsKevin Smith2015-11-17-7/+7
| | | | | | | | | | | | | | | | | | | | Functions that do not modify the pointer passed should declare it as const. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | arm: mvebu: a38x: Remove unsupported topologiesKevin Smith2015-11-17-1315/+0
|/ | | | | | | | | | | | | | A lot of extra configuration information was left over in the Marvell serdes and DDR3 initialization code for boards that U-boot does not support. Remove this extra config information, and the concept of fixing up board topologies with information loaded from an EEPROM. If this needs to be done, it should be handled in the board file, not in core code. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-11-16-219/+587
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| * imx: mx7: compile misc.c for mx7Peng Fan2015-11-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | Compile misc.c for mx7, since we need related function for lcdif and nand. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: imx-common: power down lcdif before boot osPeng Fan2015-11-12-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to call lcdif_power_down to make lcdif in initial state before kernel boot. Similar issue for uboot reset with lcdif enabled, system will hang after serveral times resetting. Need to let lcdif initial state to make all go well. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: mx6: implement reset_miscPeng Fan2015-11-12-0/+7
| | | | | | | | | | | | | | | | We need to power down lcdif before uboot reset to make reset can pass stress test. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * video: mxsfb: introduce lcdif_power_downPeng Fan2015-11-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introudce a new function lcdif_power_down. 1. Waits for a VSYNC interrupt to guarantee the reset is done at the VSYNC edge, which somehow makes the LCDIF consume the display FIFO(?) and helps the LCDIF work normally at the kernel stage. 2. Add power down function to stop lcdif. The reason to introduce lcdif_power_down is that we want lcdif to be in initial state when doing uboot reset or before kernel boot to make system stable, otherwise system may hang. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * imx: mx6: add clock api for lcdifPeng Fan2015-11-12-0/+247
| | | | | | | | | | | | | | | | | | Implement mxs_set_lcdclk, enable_lcdif_clock and enable_pll_video. The three API can be used to configure lcdif related clock when CONFIG_VIDEO_MXS enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: mx6: crm_reg: add LCDIF related macrosPeng Fan2015-11-12-4/+30
| | | | | | | | | | | | | | | | | | Add i.MX6UL/SX LCDIF related macros. Discard uneccessary '#ifdef xxx'. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * imx: mx6: fix register addressPeng Fan2015-11-12-6/+12
| | | | | | | | | | | | | | | | | | | | | | 1. Move WDOG3_BASE_ADDR to '#if !(defined(__ASSEMBLY__))'. 2. Add i.MX6UL LCDIF register base address. And Introduce LCDIF1_BASE_ADDR to support runtime check. 3. include <asm/imx-common/regs-lcdif.h> for imx-regs.h to avoid building error for mxsfb.c, since mxsfb.c use imx-regs.h. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: lcdif: use one register structure for i.MXesPeng Fan2015-11-12-102/+22
| | | | | | | | | | | | | | | | | | Share one lcdif structure for i.MXes. 1. Discard struct mxs_lcdif_regs from imx-regs.h of i.MX7 2. Add i.MX6SX/6UL/7D support in imx-lcdif.h of imx-common Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: imx-common: move lcdif structure and macro definition to imx-commonPeng Fan2015-11-12-1/+1
| | | | | | | | | | | | | | | | Move 'struct mxs_lcdif_regs' and lcdif related macro definitions to arch/arm/include/asm/imx-common/regs-lcdif.h. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: include linux/types.h for regs-common.hPeng Fan2015-11-12-0/+2
| | | | | | | | | | | | | | | | There are uint8_t, uint32_t types in regs-common.h, so include linux/types.h. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: regs-common.h must be wrapped with !__ASSEMBLY__Peng Fan2015-11-12-1/+1
| | | | | | | | | | | | | | regs-common.h must be wrapped with #ifndef __ASSEMBLY__ Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: add parameter base_addr for mxs_set_lcdclkPeng Fan2015-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | Change mxs_set_lcdclk prototype to add a new parameter base_addr. There are two LCD interfaces for i.MX6SX, we may support LCDIF1 or LCDIF2. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * mx7: psci: add basic psci supportPeng Fan2015-11-12-0/+139
| | | | | | | | | | | | | | | | | | | | | | | | 1. add basic psci support for imx7 chip. 2. support cpu_on and cpu_off. 3. switch to non-secure mode when boot linux kernel. 4. set csu allow accessing all peripherial register in non-secure mode. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * arm: discard relocation entries for secure textPeng Fan2015-11-12-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code such as PSCI in section named secure is bundled with u-boot image, and when bootm, the code will be copied to their runtime address same to compliation/linking address - CONFIG_ARMV7_SECURE_BASE. When compile the PSCI code and link it into the u-boot image, there will be relocation entries in .rel.dyn section for PSCI. Actually, we do not needs these relocation entries. If still keep the relocation entries in .rel.dyn section, r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid address which may not support read/write for one SoC. 102 /* relative fix: increase location by offset */ 103 add r0, r0, r4 104 ldr r1, [r0] 105 add r1, r1, r4 106 str r1, [r0] So discard them to avoid touching the relocation entry in arch/arm/lib/relocate.S. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Tom Warren <twarren@nvidia.com> Cc: York Sun <yorksun@freescale.com> Cc: Hans De Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * Merge git://git.denx.de/u-bootStefano Babic2015-11-12-773/+4042
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| * | imx: hab: add mx7 secure boot supportAdrian Alonso2015-10-30-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mx7 secure boot support, add helper macro IS_HAB_ENABLED_BIT to get the corresponding bit mask per SoC (mx7 or mx6) to identify if securue boot feature is enabled/disabled. On authenticate_image only check for mmu enabled on mx6 SoC to force pu_irom_mmu_enabled so ROM code can perform mmu cache flush mx7 SoC ROM code does not have this issue as ROM enables cache support based on fuse settings. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | imx: hab: use read_fuse for secure boot settingsAdrian Alonso2015-10-30-5/+12
| | | | | | | | | | | | | | | | | | | | | Use read_fuse api fuction call to read secure boot fuse settings (enabled/disabled). Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | arm: imx: add secure boot fuse details for imx7 SoCAdrian Alonso2015-10-30-0/+8
| | | | | | | | | | | | | | | | | | | | | Add secure boot fuse details (location) bank = 1, word = 3; for imx7 SoC platforms. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | arm: imx: add secure boot fuse details for imx6 SoCAdrian Alonso2015-10-30-0/+8
| | | | | | | | | | | | | | | | | | | | | Add secure boot fuse details (location) bank = 0, word = 6; for imx6 SoC platforms. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | imx: hab: add secure boot fuse detailsAdrian Alonso2015-10-30-0/+9
| | | | | | | | | | | | | | | | | | | | | Add secure boot fuse helper struct to abstract the way to find out secure boot settings per SoC iMX family Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | imx: hab: rework unified rom section for mx7Adrian Alonso2015-10-30-0/+2
| | | | | | | | | | | | | | | | | | | | | Rework unified section macro select via Kconfig option instead of macro definition in mx7_common header file. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | imx: hab: use unified rom section for mx6sx and mx6ulAdrian Alonso2015-10-30-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_ROM_UNIFIED_SECTIONS for mx6sx and mx6ul target platforms to resolve corresponding HAB_RVT_BASE base address, the RVT table contains pointers to the HAB API functions in ROM code. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | imx: hab: rework secure boot support for imx6Adrian Alonso2015-10-30-2/+2
| | | | | | | | | | | | | | | | | | | | | Rework secure boot support for imx6, move existing hab support for imx6 into imx-common for SoC reuse. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | imx: cpu: move common chip revision id'sAdrian Alonso2015-10-30-19/+13
| | | | | | | | | | | | | | | | | | | | | Move common chip revision id's to main cpu header file mx25 generic include cpu header for chip revision Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * | arm, imx: add some gpr register definesHeiko Schocher2015-10-30-0/+35
| | | | | | | | | | | | | | | | | | add some missing gpr register defines. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | imx-common: timer: clean up codePeng Fan2015-10-30-73/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can reuse common functions in lib/time.c, but not reimplement functions in imx-common/time.c. Only keep timer_init ,get_tbclk and implement timer_read_counter in imx-common/time.c. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-11-12-634/+807
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| * | | ARM: tegra: note that p2371-2180 is Jetson TX1Stephen Warren2015-11-12-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p2371-2180 is the engineering board name for the Jetson TX1 developer kit. Update Kconfig description and help text to make this obvious to everyone. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: rename GPU functionsAlexandre Courbot2015-11-12-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename GPU functions to less generic names to avoid potential name collisions. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: simplify GPU setupAlexandre Courbot2015-11-12-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the GPU node in the system-wide ft_system_setup() hook instead of the board-specific ft_board_hook(). This allows us to enable GPU per SoC generation instead of per-board as we did initially. Reported-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: remove vpr_configured() functionAlexandre Courbot2015-11-12-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no justification for this function, especially in exported form. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: error check Tegra210 XUSB padctl waitsStephen Warren2015-11-12-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to detect timeouts when waiting for HW events such as PLL lock done. Any errors are logged and trigger an error return code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: add lane tables to Tegra210 XUSB padctlStephen Warren2015-11-12-6/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the tables defining which pads and mux options exist in the Tegra210 XUSB padctl hardware. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: switch Tegra210 to common XUSB padctlStephen Warren2015-11-12-158/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change simply deletes code from the Tegra210 XUSB padctl driver that is already present in the common XUSB padctl code. Since all the arrays in tegra210_socdata are empty, this update may leave the Tegra210 XUSB padctl driver non-functional at run-time. However, (a) this driver is not used yet so no regression can be observed and (b) the next commit will immediately fix this up. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: parameterize common XUSB codeStephen Warren2015-11-12-82/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some differences between the Tegra124 and Tegra210 XUSB padctl code. So far, the common XUSB padctl code only supports Tegra124. Add some parameters etc. so that it can work for both chips. This also allows moving Tegra124's process_nodes() into the common file; something that would have requires edits during the move if done in the previous commit. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-14 10:11:55 +0000