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* ARM: uniphier: skip memreserve of unused DRAM bank of LD20Masahiro Yamada2017-02-23-0/+3
| | | | | | | | Now the "for" loop here iterates on the detected memory banks. It must skip unused DRAM banks. Fixes: c995f3a3c526 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: correct spelling of "invalid"Masahiro Yamada2017-02-23-3/+3
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is setMasahiro Yamada2017-02-23-1/+1
| | | | | | | If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused. The register settings for the ch2 should be ignored. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: revive accidentally removed dcache_disable()Masahiro Yamada2017-02-23-0/+4
| | | | | | | | | Commit a8e6300d483d ("ARM: uniphier: refactor spl_init_board()") accidentally dropped dcache_disable() call. Since then, the SPL of LD11 and LD20 failed to load U-Boot proper. Fixes: a8e6300d483d ("ARM: uniphier: refactor spl_init_board()") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: DRA7xx: Fix memory allocation overflowAndrew F. Davis2017-02-17-1/+1
| | | | | | | | | | When using early malloc the allocated memory can overflow into the SRAM scratch space, move NON_SECURE_SRAM_IMG_END down a bit to allow more dynamic allocation at the expense of a slightly smaller maximum image size. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* SPL: Move SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to KconfigDalon Westergreen2017-02-17-0/+1
| | | | | | | | | | | Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig. Due to SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION being moved to Kconfig the board defconfigs for db-88f6820-gp_defconfig kc1_defconfig and sniper_defconfig need to be updated. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
* SPL: add support to boot from a partition typeDalon Westergreen2017-02-17-0/+6
| | | | | | | | | | | | | the socfpga bootrom supports mmc booting from either a raw image starting at 0x0, or from a partition of type 0xa2. This patch adds support for locating the boot image in the first type 0xa2 partition found. Assigned a partition number of -1 will cause a search for a partition of type CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE and use it to find the u-boot image Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
* arm: omap5: Fix generation of reserved-memory DT nodeAndrew F. Davis2017-02-17-1/+6
| | | | | | | | | When the node 'reserved-memory' is not defined in the DT we fail to add needed properties. We also fail to move 'offs' to point to the new node. Fix these here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* flash: complete CONFIG_SYS_NO_FLASH move with renamingMasahiro Yamada2017-02-12-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is not completed. Finish this work by the tool. During this move, let's rename it to CONFIG_MTD_NOR_FLASH. Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH" than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will make the code more readable. Besides, negative meaning symbols do not fit in obj-$(CONFIG_...) style Makefiles. This commit was created as follows: [1] Edit "default n" to "default y" in the config entry in common/Kconfig. [2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH" [3] Rename the instances in defconfigs by the following: find . -path './configs/*_defconfig' | xargs sed -i \ -e '/CONFIG_SYS_NO_FLASH=y/d' \ -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/' [4] Change the conditionals by the following: find . -name '*.[ch]' | xargs sed -i \ -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \ -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \ -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \ -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/' [5] Modify the following manually - Rename the rest of instances - Remove the description from README - Create the new Kconfig entry in drivers/mtd/Kconfig - Remove the old Kconfig entry from common/Kconfig - Remove the garbage comments from include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2017-02-11-65/+65
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| * rockchip: rename miniarm to tinker boardEddie Cai2017-02-09-10/+10
| | | | | | | | | | | | | | | | Miniarm is the internal project code. Now it is officially named Tinker board. So rename it. Signed-off-by: Eddie Cai <eddie.cai@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: dts: rk3288: correct sdram setting for miniarmJacob Chen2017-02-09-8/+8
| | | | | | | | | | | | | | | | | | | | | | miniarm board use lpddr3 Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Added 'rockchip:' prefix to subject: Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I84c3679dab2dbd8d01c1ebfd22220946d07c03cd
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2017-02-09-2/+2
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| * | net: phy: dp83867: Add support for MAC impedance configurationMugunthan V N2017-02-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for programmable MAC impedance configuration and fix typo in DT impedance parameters names. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2017-02-09-8/+142
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| * | | arm: dts: trats: add the pmic node for using DMJaehoon Chung2017-02-09-8/+142
| | |/ | |/| | | | | | | | | | | | | | | | | | | To use driver-model adds the pmic node for max8997. This is used as kernel device-tree in Linux. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2017-02-08-0/+9
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| * | arm: socfpga: set the mpuclk divider in the Altera group registerDinh Nguyen2017-02-08-0/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The mpuclk register in the Altera group of the clock manager divides the mpu_clk that is generated from the C0 output of the main pll. Without this patch, the default value of the register is 1, so the mpuclk will always get divided by 2 if the correct value is not set. For example, on the Arria5 socdk board, the MPU clock is only 525 MHz, and it should be 1.05 GHz. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
* | Merge git://git.denx.de/u-boot-dmTom Rini2017-02-08-2/+2
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| * | dm: core: Replace of_offset with accessorSimon Glass2017-02-08-2/+2
| |/ | | | | | | | | | | | | | | | | At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cmd: move CONFIG_CMD_UNZIP and CONFIG_CMD_ZIP to KconfigMasahiro Yamada2017-02-08-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_CMD_ZIP is not defined by any board. I am moving CONFIG_CMD_UNZIP to defconfig files except UniPhier SoC family. I am the maintainer of UniPhier platform, so I know "select CMD_UNZIP" is better for this platform. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* | arm64: fix comment in relocate_64.SMasahiro Yamada2017-02-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two typos in the comment "invalide i-cache is enabled". We can fix it by invalide -> invalidate is -> if Or, if we want to match the comment to the code, we can say "skip invalidating i-cache if disabled". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | ARM: dts: k2*: Rename the k2* files to keystone-k2* filesLokesh Vutla2017-02-08-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As reported in [1], rename the k2* dts files to keystone-* files this will force consistency throughout. Script for the same (and hand modified for Makefile and config files): for i in arch/arm/dts/k2* do b=`basename $i`; git mv $i arch/arm/dts/keystone-$b; sed -i -e "s/$b/keystone-$b/g" arch/arm/dts/*[si] done This is similar to linux kernel commit 5edafc29829bc ("ARM: dts: k2*: Rename the k2* files to keystone-k2* files") [1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm64: use store with auto-incrementMasahiro Yamada2017-02-08-2/+1
| | | | | | | | | | | | | | Save one instruction. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arm64: use xzr to zero-out the bss sectionMasahiro Yamada2017-02-08-2/+1
|/ | | | | | | AArch64 has a zero register (xzr). Use it instead of x2. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-02-03-24/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/ls1046aqds_defconfig configs/ls1046aqds_nand_defconfig configs/ls1046aqds_qspi_defconfig configs/ls1046aqds_sdcard_ifc_defconfig configs/ls1046aqds_sdcard_qspi_defconfig configs/ls1046ardb_emmc_defconfig configs/ls1046ardb_qspi_defconfig configs/ls1046ardb_sdcard_defconfig
| * arch: arm: update the IFC IP input clockPrabhakar Kushwaha2017-02-03-24/+5
| | | | | | | | | | | | | | | | | | | | | | | | IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls1012a: Enable secure DDR on LS1012A platformsPrabhakar Kushwaha2017-02-03-0/+3
| | | | | | | | | | | | | | | | | | | | | | PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: Enable workaround for erratum A-008336York Sun2017-01-31-0/+1
| | | | | | | | | | | | | | Erratum A-008336 applies to LS1046A per latest SoC document. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
| * armv8: ls1046a: added usb nodes in dtsTang Yuantian2017-01-27-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | The LS1046A processor has three integrated USB 3.0 controllers (USB1, USB2, and USB3) that allow direct connection to the USB ports with appropriate protection circuitry and power supplies. USB1 and USB2 ports are powered by a NX5P2190UK device, which supplies 5v power at up to 1.2 A. The power enable and power-fault-detect pins are connected to the LS1046A processor via CPLD for individual port management. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-02-01-30/+3075
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| * | BOARD: MCCMON6: Provide support for iMX6q based mccmon6 boardLukasz Majewski2017-01-30-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This patch provides u-boot support for Liebherr (LWN) mccmon6 board. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | arm: dts: imx53-cx9020: fix packetloss on fec_mxcPatrick Bruenn2017-01-30-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinmuxing for i.MX53 FEC ethernet copied from <kernel>/arch/arm/boot/dts/imx53-qsb-common.dtsi (at least until v4.9) was bad. It is different from the manual pinmuxing in <u-boot>/board/freescale/mx53loco/mx53loco.c which was used in cx9020 implementation previously before mainlining into u-boot. It seems the bug in imx53-qsb kernel device tree is hidden for so long, because it was never used, by the kernel driver. Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
| * | imx: dts: mx6sxsabreauto: enable i2c2/3Peng Fan2017-01-27-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c2/3, add pinctrl settings. Add max7310 for i2c3. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6sx: add dts for mx6sxsabreauto boardPeng Fan2017-01-27-0/+3003
| | | | | | | | | | | | | | | | | | | | | | | | Add dts for mx6sxsabreauto board. dts related files imported fro Linux (commit e5517c2a5a4). Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | ARM: imx6ul: Move liteSOM source to SoC directoryMarcin Niestroj2017-01-27-18/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested in [1] during discussion of chiliSOM support patches. [1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | imx_common: check for bmode Serial DownloaderStefan Agner2017-01-27-2/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before commit 81c4eccb55cc ("imx: mx6: fix USB bmode to use reserved value") a non-reserved value has been used to trigger Serial Downloader using bmode, which translated to a GPR9 value of 0x10. However, on some boards the non-reserved value lead to unreliable bmode command. With the above mentioned commit, U-boot switched to use [7:4] b0001, which translates to GPR9 0x10 for Serial Downloader mode. Check for the new value and classify it as Serial Downloader mode. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> CC: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-02-01-2/+382
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| * | arm: mvebu: Implement secure bootMario Six2017-02-01-0/+371
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch implements secure booting for the mvebu architecture. This includes: - The addition of secure headers and all needed signatures and keys in mkimage - Commands capable of writing the board's efuses to both write the needed cryptographic data and enable the secure booting mechanism - The creation of convenience text files containing the necessary commands to write the efuses The KAK and CSK keys are expected to reside in the files kwb_kak.key and kwb_csk.key (OpenSSL 2048 bit private keys) in the top-level directory. Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: spl.c: Remove useless gd declarationReinhard Pfau2017-02-01-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ddaa905 ("arm: mvebu: Add DM (driver model) support") removed the assignment of the gd pointer, but kept the (now superfluous) declaration of the gd pointer. Remove this declaration. Signed-off-by: Reinhard Pfau <pfau@gdsys.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | mvebu: Add board_pex_config()Mario Six2017-02-01-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allow boards to do some initialization when PCIe comes up. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | pci: mvebu: Fix Armada 38x supportDirk Eibach2017-02-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada 38x has four PCI ports, not three. The optimization in pci_init_board() seems to assume that every port has three lanes. This is obviously wrong, and breaks support for Armada 38x. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQMasahiro Yamada2017-01-31-1/+1
|/ / | | | | | | | | | | | | | | | | Make the naming scheme consistent; all SDHCI-base drivers prefixed with CONFIG_MMC_SDHCI_. While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: compile board data only for SPLMasahiro Yamada2017-01-29-1/+1
| | | | | | | | | | | | | | Now U-Boot proper need not get the uniphier_boards array. Compile it only for SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: refactor cmd_ddrmphyMasahiro Yamada2017-01-29-83/+112
| | | | | | | | | | | | Make it look like cmd_ddrphy. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: clean up UMC init for PXs2 SoCMasahiro Yamada2017-01-29-283/+284
| | | | | | | | | | | | | | | | | | Just cosmetic changes: - Rename prefix DMPHY_ to MPHY_ for consistency - Move UMC parameters below for complete decouple of PHY and UMC - Remove redundant whitespaces Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: refactor cmd_ddrphyMasahiro Yamada2017-01-29-73/+83
| | | | | | | | | | | | | | It seems more readable to use arrays to get SoC specific parameters instead of the crappy switch statement. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoCMasahiro Yamada2017-01-29-10/+3
| | | | | | | | | | | | | | | | | | | | For LD20 SoC, the last 64 byte of each DRAM bank is used for the dynamic training of DRAM PHY. The regions must be reserved in DT to prevent the kernel from using them. Now gd->bd->bi_dram reflects the actual memory banks. Just use it instead of getting access to the board parameters. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: detect RAM size by decoding HW register instead of DTMasahiro Yamada2017-01-29-49/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot needs to set up available memory area(s) in dram_init() and dram_init_banksize(). It is platform-dependent how to detect the memory banks. Currently, UniPhier adopts the memory banks _alleged_ by DT. This is based on the assumption that users bind a correct DT in their build process. Come to think of it, the DRAM controller has already been set up before U-Boot is entered (because U-Boot runs on DRAM). So, the DRAM controller setup register seems a more reliable source of any information about DRAM stuff. The DRAM banks are initialized by preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever), so this means the source of the reliability is shifted from Device Tree to such early-stage firmware. However, if the DRAM controller is wrongly configured, the system will crash. If your system is running, the DRAM setup register is very likely to provide the correct DRAM mapping. Decode the SG_MEMCONF register to get the available DRAM banks. The dram_init() and dram_init_banksize() need similar decoding. It would be nice if dram_init_banksize() could reuse the outcome of dram_init(), but global variables are unavailable at this stage because the .bss section is available only after the relocation. As a result, SG_MEMCONF must be checked twice, but a new helper uniphier_memconf_decode() will help to avoid code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: shrink arrays of DDR-PHY parameters for LD20 SoCMasahiro Yamada2017-01-29-175/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | The two arrays ddrphy_{op,ip}_dq_shift_val, occupy more than 3.8 KB memory footprint, which is significant in SPL. There are PHY parameters for 5 boards, but they are actually not board specific, but SoC specific. After all, we just need to have 2 patterns, for LD20 and LD21. Also, the shift values are small enough to become "short" type instead of "int". This change will save about 3 KB memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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