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* driver/ddr/fsl: Add workaround for A008336York Sun2015-02-24-0/+5
| | | | | | | Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space for 64-bit DDR controllers. Signed-off-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Add fdt-fixup for clock frequency of the DUART nodesBhupesh Sharma2015-02-24-0/+5
| | | | | | | | This patch adds the fdt-fixup logic for the clock frequency of the NS16550A related device tree nodes. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stackYork Sun2015-02-24-61/+97
| | | | | | | | | | | | Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using assembly function to guarantee stack is not used before flushing is completed. Timeout is needed for simualtor on which CCN-504 is not implemented. Return value can be checked for timeout situation. Change bootm.c to disable dcache instead of simply flushing, required by flushing L3. Signed-off-by: York Sun <yorksun@freescale.com>
* ARMv8/fsl-lsch3: Patch cpu node properties in DT for online coresArnab Basu2015-02-24-9/+23
| | | | | | | | U-Boot should only add "enable-method" and "cpu-release-address" properties to the "cpu" node of the online cores. Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Change normal memory shareabilityYork Sun2015-02-24-4/+5
| | | | | | | According to hardware implementation, a single outer shareable global coherence group is defined. Inner shareable has not bee enabled. Signed-off-by: York Sun <yorksun@freescale.com>
* fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accessesBhupesh Sharma2015-02-24-0/+82
| | | | | | | | | | | | | This patch ensures that the TZPC (BP147) and TZASC-400 programming happens for LS2085A SoC only when the desired config flags are enabled and ensures that the TZPC programming is done to allow Non-secure (NS) + secure (S) transactions only for DCGF registers. The TZASC component is not present on LS2085A-Rev1, so the TZASC-400 config flag is turned OFF for now. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge git://git.denx.de/u-boot-sunxiTom Rini2015-02-21-0/+9
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| * sunxi: Fix sun5i mbus speed when booting old kernelsHans de Goede2015-02-21-0/+9
| | | | | | | | | | | | | | | | | | Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, halving the mbus frequency, so set it to 300 MHz ourselves and base the mbus divider on that. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | rpi: add support for Raspberry Pi 2 model BStephen Warren2015-02-21-1/+10
| | | | | | | | | | | | | | | | USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | bcm2836 SoC support (used in Raspberry Pi 2 model B)Stephen Warren2015-02-21-4/+39
| | | | | | | | | | | | | | | | | | | | | | | | The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | bcm2835/rpi: add SPDX license tags for some filesStephen Warren2015-02-21-43/+5
| | | | | | | | Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | ARM: prepare for including <mach/*.h>Masahiro Yamada2015-02-21-0/+2
| | | | | | | | | | | | | | | | | | | | | | This commit adds $(srctree)/arch/arm/$(machdirs)/include/mach to the headers search path. It allows us to replace "#include <asm/arch/foo.h>" with "#include <mach/foo.h>". As "#include <asm/arch/foo.h>" is still supported, we can modify each file one by one. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: keystone: move SoC headers to mach-keystone/include/machMasahiro Yamada2015-02-21-0/+0
| | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-keystone/* -> arch/arm/mach-keystone/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | ARM: orion5x: move SoC headers to mach-orion5x/include/machMasahiro Yamada2015-02-21-0/+0
| | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-orion5x/* -> arch/arm/mach-orion5x/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | ARM: nomadik: move SoC headers to mach-nomadik/include/machMasahiro Yamada2015-02-21-0/+0
| | | | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-nomadik/* -> arch/arm/mach-nomadik/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> Cc: Alessandro Rubini <rubini@unipv.it>
* | ARM: kirkwood: move SoC headers to mach-kirkwood/include/machMasahiro Yamada2015-02-21-0/+0
| | | | | | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-kirkwood/* -> arch/arm/mach-kirkwood/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | ARM: davinci: move SoC headers to mach-davinci/include/machMasahiro Yamada2015-02-21-0/+0
| | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-davinci/* -> arch/arm/mach-davinci/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | ARM: at91: move SoC headers to mach-at91/include/machMasahiro Yamada2015-02-21-0/+0
| | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: keystone: move SoC sources to mach-keystoneMasahiro Yamada2015-02-21-2/+2
| | | | | | | | | | | | | | | | Move arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | ARM: versatile: move SoC sources to mach-versatileMasahiro Yamada2015-02-21-2/+2
| | | | | | | | | | | | | | Move arch/arm/cpu/arm926ejs/versatile/* -> arch/arm/mach-versatile/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: orion5x: move SoC sources to mach-orion5xMasahiro Yamada2015-02-21-2/+3
| | | | | | | | | | | | | | | | Move arch/arm/cpu/arm926ejs/orion5x/* -> arch/arm/mach-orion5x/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | ARM: highbank: move SoC sources to mach-highbankMasahiro Yamada2015-02-21-2/+2
| | | | | | | | | | | | | | | | Move arch/arm/cpu/armv7/highbank/* -> arch/arm/mach-highbank/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Rob Herring <robh@kernel.org>
* | ARM: nomadik: move SoC sources to mach-nomadikMasahiro Yamada2015-02-21-2/+2
| | | | | | | | | | | | | | | | | | Move arch/arm/cpu/arm926ejs/nomadik/* -> arch/arm/mach-nomadik/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> Cc: Alessandro Rubini <rubini@unipv.it>
* | ARM: kirkwood: move SOC sources to mach-kirkwoodMasahiro Yamada2015-02-21-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move arch/arm/cpu/arm926ejs/kirkwood/* -> arch/arm/mach-kirkwood/* Note: Perhaps, can we merge arch/arm/mach-kirkwood and arch/arm/mvebu-common into arch/arm/mach-mvebu, like Linux? Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | ARM: davinci: move SoC sources to mach-davinciMasahiro Yamada2015-02-21-6/+6
| | | | | | | | | | | | | | | | Move arch/arm/cpu/arm926ejs/davinci/* -> arch/arm/mach-davinci/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* | ARM: tegra: collect SoC sources into mach-tegraMasahiro Yamada2015-02-21-122/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit moves files as follows: arch/arm/cpu/arm720t/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/arm720t/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/arm720t/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/arm720t/tegra124* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/arm720t/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/armv7/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/armv7/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/armv7/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/armv7/tegra124/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/armv7/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/tegra20-common/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/tegra30-common/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/tegra114-common/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/tegra124-common/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/tegra-common/* -> arch/arm/mach-tegra/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> [ on nyan-big ] Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* | ARM: at91: collect SoC sources into mach-at91Masahiro Yamada2015-02-21-24/+14
| | | | | | | | | | | | | | | | | | | | | | | | This commit moves source files as follows: arch/arm/cpu/arm920t/at91/* -> arch/arm/mach-at91/arm920t/* arch/arm/cpu/arm926ejs/at91/* -> arch/arm/mach-at91/arm926ejs/* arch/arm/cpu/armv7/at91/* -> arch/arm/mach-at91/armv7/* arch/arm/cpu/at91-common/* -> arch/arm/mach-at91/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
* | ARM: prepare for moving SoC sources into mach-*Masahiro Yamada2015-02-21-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In U-boot, the directory structure, arch/$(ARCH)/cpu/$(CPU)/$(SOC)/ has been adopted except that $(CPU) is missing from some architectures and $(SOC) is missing from some CPUs. This structure did not fit very well in some cases. [1] AT91 AT91 SoC family have been developed across some ARM processor generations. Generally speaking, some IPs are often re-used in the same SoC family (same SoC vendor) even when the main processor is updated. As a result, a SoC-common directory is needed in the upper level. Currently, AT91 source files are placed as follows: arch/arm/cpu/arm920t/at91/* arch/arm/cpu/arm926ejs/at91/* arch/arm/cpu/armv7/at91/* arch/arm/cpu/at91-common/* Once directories are split, the motivation for refactorings across CPU directories is lost. Some files in arm920t/at91/ and arm926ejs/at91/ are so similar that they could be merged. [2] Tegra Tegra is a little bit special case where different CPUs are used for SPL and the main U-boot. To obey the arch/$(ARCH)/cpu/$(CPU)/$(SOC) structure, the source files must be placed across the CPUs, again SoC-common directory is necessary in the upper level. Moreover, there are several families in Tegra: Tegra20, Tegra30, Tegra114, Tegra124. Here again, the tegra-common directory is needed to contain commonly-used files. Tegra directories have been sprinkled in the directory structure. arch/arm/cpu/arm720t/tegra20 arch/arm/cpu/arm720t/tegra30 arch/arm/cpu/arm720t/tegra114 arch/arm/cpu/arm720t/tegra124 arch/arm/cpu/arm720t/tegra-common arch/arm/cpu/armv7/tegra20 arch/arm/cpu/armv7/tegra30 arch/arm/cpu/armv7/tegra114 arch/arm/cpu/armv7/tegra124 arch/arm/cpu/armv7/tegra-common arch/arm/cpu/tegra20-common arch/arm/cpu/tegra30-common arch/arm/cpu/tegra114-common arch/arm/cpu/tegra124-common arch/arm/cpu/tegra-common As you see, splitting SoC code by the CPU is not going well, especially for ARM. Why don't we collect SoC-specific files into a single place? A good example we can follow is Linux's arch/arm/mach-* structure. This item was discussed in the following thread: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/188548/ Looks like I got some positive responses and we are almost ready to start this movement. This commit prepares arch/arm/Makefile for describing machdirs in it. After this commit, we can move SoC directory to arch/arm/mach-$(SOC) in simple steps although some cases such as AT91 and Tegra need more fixes. What we generally have to do is: [1] Move files arch/arm/cpu/$(CPU)/$(SOC)/* to arch/arm/mach-$(SOC)/* [2] Add machine entry into arch/arm/Makefile [3] Remove "obj-y += $(SOC)" from arch/arm/cpu/$(CPU)/Makefile [4] Fix the Kconfig file path in arch/arm/Kconfig [5] Modify MAINTAINERS if necessary Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: at91: move board select menu and common settingsMasahiro Yamada2015-02-21-155/+172
|/ | | | | | | | | | | | | | | | | | | | | | | The board select menu in arch/arm/Kconfig is still big. To slim down it, this commit moves AT91 boards to arch/arm/mach-at91/Kconfig. Also, consolidate "config SYS_SOC" in each board Kconfig. The Kconfig files under board/ directory were modified with the following command: find board -name Kconfig | xargs sed -i -e ' /config SYS_SOC/ { N /default "at91"/ { N d } } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
* Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2015-02-17-0/+43
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| * common/board_f: factor out reserve_stacksAndreas Bießmann2015-02-17-0/+43
| | | | | | | | | | | | | | | | Introduce arch_reserve_stacks() to tailor gd->start_addr_sp and gd->irq_sp to the architecture needs. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-02-17-119/+164
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| * | sunxi: Support the FEL boot mode in the regular u-boot buildSiarhei Siamashka2015-02-16-10/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So that the CONFIG_SPL_FEL option is not needed anymore. And the regular SPL binary, generated by the default u-boot build, is now also bootable over USB in the FEL mode. The SPL still can boot from the SD card too. A bunch of system registers need to be saved/restored in order to ensure that the IRQ handler still works in the BROM FEL code after getting control back from the SPL. This is done in the sunxi code instead of abusing ifdefs in 'start.S'. The decision whether to load the main u-boot binary from the SD card or return to the FEL code in the BROM is done at runtime. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [hdegoede@redhat.com: Since we now restore various regs before returning to the FEL BROM code we can drop the sunxi specific #ifdefs in start.S] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Normalise FEL supportSimon Glass2015-02-16-88/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | arm: spl: Provide for a board-specific loaderSimon Glass2015-02-16-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards have a special way of loading U-Boot that does not fit with the existing SPL code. For example sunxi uses an 'FEL' mode where U-Boot is loaded over USB. Add a CONFIG option and boot mode for this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | arm: Allow lr to be saved by board codeSimon Glass2015-02-16-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: dram: Un-inline dram helper functionsHans de Goede2015-02-16-26/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | ARM: lpc3250: config: add generic board supportVladimir Zapolskiy2015-02-16-1/+3
| | | | | | | | | | | | | | | | | | | | | The only LPC3250 board works fine with enabled generic board support, add CONFIG_SYS_GENERIC_BOARD right into the arch config header. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* | | keystone2: ddr3: eliminate using global ddr3_size variableVitaly Andrianov2015-02-16-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
* | | clock_am43xx:Set the MAC clock to /5 for OPP100Steve Kipisz2015-02-16-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
* | | ARM: DRA7-evm: DDR3: Update leveling valuesLokesh Vutla2015-02-16-30/+30
| | | | | | | | | | | | | | | | | | | | | Update the software leveling parameters. This fixes the random crash seen on DRA7-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register valueLokesh Vutla2015-02-16-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clockAngela Stegmaier2015-02-16-8/+8
| |/ |/| | | | | | | | | | | | | | | | | DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Merge git://git.denx.de/u-boot-samsungTom Rini2015-02-13-325/+338
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| * | Exynos: Clock: Cleanup soc_get_periph_rateAkshay Saraswat2015-02-13-39/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have src, div and pre-div mask bits defined corresponding to peripherals, calculation of clock specific to I2C appears redundant and confusing. Using clk_bit_info struct we can write calculations generic to all peripherals which makes code easy to understand and free from peripheral specific exceptions. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos: clock: change mask bits as per peripheralAkshay Saraswat2015-02-13-73/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have assumed and kept mask bits for divider and pre-divider as 0xf and 0xff, respectively. But these mask bits change from one peripheral to another, and hence, need to be specified in accordance with the peripherals. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos5: Use clock_get_periph_rate generic APIAkshay Saraswat2015-02-13-235/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replacing SoC and peripheral specific function calls with generic clock_get_periph_rate calls to get the peripheral clocks. Also, removing dead code of peripheral and SoC specific function implementations which was used earlier for fetching peripheral clocks. This code is not being used anymore because of the introduction of generic clock_get_periph_rate function. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos5: Fix exynos5_get_periph_rate calculationsAkshay Saraswat2015-02-13-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos5_get_periph_rate function reads incorrect div for SDMMC2 & 3. It also reads prediv and does division only for SDMMC0 & 2 when actually various other peripherals need that. Adding changes to fix these mistakes in periph rate calculation. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos542x: Add and enable get_periph_rate supportAkshay Saraswat2015-02-13-7/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We planned to fetch peripheral rate through one generic API per peripheral. These generic peripheral functions are in turn expected to fetch apt values from a function refactored as per SoC versions. This patch adds support for fetching peripheral rates for Exynos5420 and Exynos5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos542x: Move exynos5420_get_pll_clk up and renameAkshay Saraswat2015-02-13-41/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving exynos5420_get_pll_clk function definition up in the code to keep it together with rest of SoC_get_pll_clk functions. This makes code more legible and also removes the need of declaration when called before the position of definition in code. Also, renaming exynos5420_get_pll_clk to exynos542x_get_pll_clk because it is being used for both Exynos 5420 and 5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-09-23 14:33:18 +0000