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* imx: Add support for USB EHCI on imx25Matthias Weisser2011-07-14-1/+1
| | | | | | | Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* imx: Use correct imx25 reset.cMatthias Weisser2011-07-14-4/+2
| | | | | | imx25 used the wrong reset.c from imx27 Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* imx: Add get_tbclk() function for imx25Matthias Weisser2011-07-14-0/+12
| | | | | | Need this function for autoboot keyd Signed-off-by: Matthias Weisser <weisserm@arcor.de>
* mx27: Make the UART port number explicitFabio Estevam2011-07-14-2/+2
| | | | | | | | mx27_uart_init_pins does the IOMUX setting for UART1 port. Change the function name to make the UART port number explicit. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* build: Add targets for auto gen of asm-offsets.h and use it in imx35Matthias Weisser2011-07-14-11/+0
| | | | | | | | asm-offsets.h should be auto generated. This patch adds two rules to rules.mk which makes this possible and removes the rules on imx35. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
* arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSIHolger Brunck2011-07-04-0/+2
| | | | | | | | | | | Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI on in this case. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* Fix compiler error for cpu at91sam9, if lowlevel init is enabledJens Scharsig2011-07-04-1/+1
| | | | | | | * Fix compiler error for cpu at91sam9, if lowlevel init is enabled * use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC Signed-off-by: Jens Scharsig
* arm920t/at91: add at91rm9200_devices.cAndreas Bießmann2011-07-04-2/+93
| | | | | | | This is a copy of arm926ejs/at91 api for perpherial initialisation. At the moment we just need the usart part of the api. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: use new clock.c featuresAndreas Bießmann2011-07-04-0/+45
| | | | | | | | | This patch enables the new clock features from arm920t/at91/clock.c. This is an required step to get at91rm9200_usart replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Jens Scharsig <js_at_ng@scharsoft.de> Cc: Eric Bénard <eric@eukrea.com>
* arm920t/at91: add clock.cAndreas Bießmann2011-07-04-40/+198
| | | | | | | This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The arm926ejs specialities are removed from arm920t version and vice versa. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91rm9200.h: fix ATMEL_PMX_AA_TXD2Andreas Bießmann2011-07-04-1/+1
| | | | | | | | | This patch sets the ATMEL_PMX_AA_TXD2 to the correct value. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Jens Scharsig <js_at_ng@scharsoft.de> CC: eric@eukrea.com Acked-by: Eric Bénard <eric@eukrea.com>
* MX5: Introduce a function for setting the chip select sizeFabio Estevam2011-07-04-1/+36
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Add iomux structureFabio Estevam2011-07-04-0/+23
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX5: Make the weim structure completeFabio Estevam2011-07-04-6/+125
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* OMAP[34]: fix broken timerJohn Rigby2011-07-04-3/+4
| | | | | | | | | | | | | | | | | | | | As implemented now the timer used to implement __udelay counts to 0xffffffff and then gets stuck there because the the programmed reload value is 0xffffffff. This value is not only wrong but illegal according to the reference manual. One can reproduce the bug by leaving a board at the u-boot prompt for sometime then issuing a sleep command. The sleep will hang forever. The timer is a count up timer that reloads as it rolls over from 0xffffffff so the correct load value is 0. Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff. Signed-off-by: John Rigby <john.rigby@linaro.org> Tested-by: Igor Grinberg <grinberg@compulab.co.il>
* GPIO: Tegra2: add GPIO driver for Tegra2Tom Warren2011-07-04-10/+278
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* armv7: adapt s5pc1xx to the new cache maintenance frameworkAneesh V2011-07-04-85/+6
| | | | | | adapt s5pc1xx to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap3 to the new cache maintenance frameworkAneesh V2011-07-04-286/+176
| | | | | | adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap4 to the new cache maintenance frameworkAneesh V2011-07-04-1/+22
| | | | | | adapt omap4 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: add PL310 support to u-bootAneesh V2011-07-04-0/+189
| | | | | | | | | | | | | PL310 is the L2$ controller from ARM used in many SoCs including the Cortex-A9 based OMAP4430 Add support for some of the key PL310 operations - Invalidate all - Invalidate range - Flush(clean & invalidate) all - Flush range Signed-off-by: Aneesh V <aneesh@ti.com>
* arm: minor fixes for cache and mmu handlingAneesh V2011-07-04-2/+18
| | | | | | | | | | | 1. make sure that page table setup is not done multiple times 2. flush_dcache_all() is more appropriate while disabling cache than a range flush on the entire memory(flush_cache()) Provide a default implementation for flush_dcache_all() for backward compatibility and to avoid build issues. Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: integrate cache maintenance supportAneesh V2011-07-04-32/+51
| | | | | | | | | | - Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: rename cache related CONFIG flagsAneesh V2011-07-04-12/+7
| | | | | | | | | | | | | | | | Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message
* armv7: cache maintenance operations for armv7Aneesh V2011-07-04-1/+518
| | | | | | | | | | | | | | | | | | | | | | | | | | - Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V <aneesh@ti.com>
* arm: make default implementation of cache_flush() weakly linkedAneesh V2011-07-04-1/+3
| | | | | | | make default implementation of cache_flush() weakly linked so that sub-architectures can override it Signed-off-by: Aneesh V <aneesh@ti.com>
* Minor coding style fixes.Wolfgang Denk2011-06-27-3/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-06-23-288/+140
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: run arm_pci_init after relocation IXP42x PCI rewrite update/fix PDNB3 board update/fix IXDP425 / IXDPG425 boards add dvlhost (dLAN 200 AV Wireless G) board IXP NPE: add support for fixed-speed MII ports update/fix AcTux4 board update/fix AcTux3 board update/fix AcTux2 board update/fix AcTux1 board use -ffunction-sections / --gc-sections on IXP42x support CONFIG_SYS_LDSCRIPT on ARM fix "depend" target in npe directory Fix IXP code to work after relocation was added trigger hardware watchdog in IXP42x serial driver add support for IXP42x Rev. B1 and newer add XScale sub architecture (IXP/PXA) to maintainer list Conflicts: arch/arm/lib/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * run arm_pci_init after relocationMichael Schwingen2011-06-23-3/+3
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * IXP42x PCI rewriteMichael Schwingen2011-06-23-126/+4
| | | | | | | | | | | | | | | | clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc. code and use u-boot's PCI infrastructure instead. Move board-specific PCI setup code (clock/reset) to board directory. Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * IXP NPE: add support for fixed-speed MII portsMichael Schwingen2011-06-23-25/+42
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * use -ffunction-sections / --gc-sections on IXP42xMichael Schwingen2011-06-23-4/+9
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * support CONFIG_SYS_LDSCRIPT on ARMMichael Schwingen2011-06-23-0/+7
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * fix "depend" target in npe directoryMichael Schwingen2011-06-23-0/+1
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * Fix IXP code to work after relocation was addedMichael Schwingen2011-06-23-128/+68
| | | | | | | | | | | | | | - jump to real flash location after reset before turning off flash mirror - fix timer system to use HZ == 1000, remove broken interrupt-based code Signed-off-by: Michael Schwingen <michael@schwingen.org>
| * add support for IXP42x Rev. B1 and newerMichael Schwingen2011-06-23-2/+5
| | | | | | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
* | ARM: drop unsupported 'trab' boardWolfgang Denk2011-06-22-26/+1
|/ | | | | | | | | | The 'trab' board configuration is broken, and there is nobody who is interested and willing to fix it. Drop it. This includes support for VFD displays which have always been used by this board only. Signed-off-by: Wolfgang Denk <wd@denx.de>
* include/asm/arch-at91: update several .h files to ATMEL_xxx name schemeEric Benard2011-06-21-28/+28
| | | | Signed-off-by: Eric Bénard <eric@eukrea.com>
* arm926ejs/at91/lowlevel_init.S: fix definesEric Benard2011-06-21-19/+22
| | | | | | atmel rework changed define names which broke this file Signed-off-by: Eric Bénard <eric@eukrea.com>
* update arm/at91rm9200 work with rework rework110202Jens Scharsig2011-06-21-117/+128
| | | | | | | | | | | * convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme * Fix: timer.c compile error io.h not found with arm/at91rm9200 * update arm920t/at91 to ATMEL_xxx name scheme * update arm920t/at91 soc lib * update at91_emac driver Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
* Minor coding style cleanupWolfgang Denk2011-06-02-21/+21
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* armv7: Add ST-Ericsson u8500 archJohn Rigby2011-06-01-0/+767
| | | | | | | | Based on ST-Ericsson internal git repo. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> CC: Albert Aribaud <albert.aribaud@free.fr>
* S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)Minkyu Kang2011-05-26-20/+26
| | | | | | | The source of pwm clock is fixed at evt1. And some registers for pwm clock are removed. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: add set_mmc_clk for external clock controlJaehoon Chung2011-05-26-0/+41
| | | | | | | | | | | This patch added set_mmc_clk for external clock control. c210 didn't support host clock control. So We need external_clock_control function for c210. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5PC2XX: Support the cpu revisionMinkyu Kang2011-05-26-1/+13
| | | | | | | | S5PC210 SoC have two cpu revisions, and have some difference. So, support the cpu revision for each revision. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5P:SROM config code moved to s5p-common directoryChander Kashyap2011-05-26-17/+68
| | | | | | | | | SROM config code is made common for S5P series of boards. smdkc100.c now refers to s5p-common/sromc.c for SROM related subroutines. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: GPIO Macro Values Corrected.Chander Kashyap2011-05-26-6/+5
| | | | | | | | S5PC2XX: Macro values for Pull Up and Driver Strength were wrong. S5PC1XX: Macro values for Driver Strength were wrong. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* MX31: drop warnings due to missing prototype for mxc_watchdog_reset()Stefano Babic2011-05-23-0/+1
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: Make get_reset_cause() static and drop unreachable codeStefano Babic2011-05-23-5/+1
| | | | | | | | get_reset_cause() should not be exported. Drop code in the function after return statement that can generate warnings due to unreachable code. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX53: Handle silicon revision 2.1 caseFabio Estevam2011-05-23-7/+3
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Minor coding style cleanup.Wolfgang Denk2011-05-19-2/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
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