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* | EXYNOS5: CLOCK: Add BPLL supportRajeshwari Shinde2012-09-01-7/+24
* | EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-1/+14
* | Exynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-0/+65
* | EXYNOS5: CLOCK: define additional clock registers for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-01-108/+126
* | ARCH: SPL: Add parametric board initializerRajeshwari Shinde2012-09-01-0/+97
* | arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0Tetsuyuki Kobayashi2012-09-01-7/+14
* | tegra20: Remove armv4t build flagsAllen Martin2012-09-01-14/+0
* | arm: enable libgcc build for SPLAllen Martin2012-09-01-1/+1
* | tegra20: enable SPL for tegra20 boardsAllen Martin2012-09-01-280/+5
* | tegra20: move SDRAM param save to later in bootAllen Martin2012-09-01-5/+0
* | ARM: add tegra20 support to arm720tAllen Martin2012-09-01-1/+637
* | ARM: Fix arm720t SPL buildAllen Martin2012-09-01-0/+13
* | tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-commonAllen Martin2012-09-01-13/+59
* | tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-81/+81
* | ARM: add basic support for the Broadcom BCM2835 SoCStephen Warren2012-09-01-0/+304
* | ARM: arm1176: enable instruction cache in arch_cpu_init()Stephen Warren2012-09-01-0/+7
* | snowball: Adding board specific cache cleanup routineMathieu J. Poirier2012-09-01-0/+26
* | armv7: Adding cpu specific cache managmenentMathieu J. Poirier2012-09-01-0/+8
* | u8500: Enabling power to MMC device on AB8500 V2Mathieu J. Poirier2012-09-01-28/+89
* | u8500: Moving processor-specific functions to cpu area.Mathieu J. Poirier2012-09-01-0/+81
* | snowball: applying power to LAN and GBF controllersMathieu J. Poirier2012-09-01-3/+15
* | snowball: Moving to ux500.v2 addess scheme for PRCMU accessMathieu J. Poirier2012-09-01-32/+71
* | snowball: Adding CPU clock initialisationMathieu J. Poirier2012-09-01-4/+37
* | snowball: Adding architecture dependent initialisationMathieu J. Poirier2012-09-01-6/+91
* | u8500: Moving prcmu to cpu directoryMathieu J. Poirier2012-09-01-1/+220
* | snowball: Add support for ux500 based snowball boardMathieu J. Poirier2012-09-01-0/+212
* | davinci, c6x: Always use C version of reset codeTom Rini2012-09-01-84/+34
* | am33xx evm: Update secure_emif_sdram_config during ddr initSatyanarayana, Sandhya2012-09-01-1/+7
* | da8xx/hawkboard: Add support for ohci host controllerSughosh Ganu2012-09-01-0/+111
* | armv7: Make lowlevel_init.S's lowlevel_init do ABI compatible stackTom Rini2012-09-01-0/+1
* | omap4/5/am33xx: Make lowlevel_init available to all armv7 platformsTom Rini2012-09-01-24/+57
* | am33xx: Add support, update omap3 McSPI driverTom Rini2012-09-01-0/+5
* | am33xx: Correct MMC1, remove MMC2 supportTom Rini2012-09-01-4/+9
* | i.MX28: bug fixes in PMU configuration codeStathis Voukelatos2012-09-01-6/+6
* | MX28: Move the u-boot.bd info CPUDIR/SOCDIRMarek Vasut2012-09-01-0/+14
* | mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCsOtavio Salvador2012-09-01-1/+1
* | mxs: Clarify why we poweroff in case of brownout in 5v conflictOtavio Salvador2012-09-01-0/+4
* | mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador2012-09-01-112/+112
* | mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-01-124/+124
* | mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador2012-09-01-517/+517
* | mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador2012-09-01-1/+1
* | MX28: use a clear name for DDR2 initializationOtavio Salvador2012-09-01-6/+6
* | MX28: extend print_cpuinfo() to use chip informationOtavio Salvador2012-09-01-2/+40
* | imx: Use a clear identification of an unidentified CPU typeOtavio Salvador2012-09-01-2/+2
* | Enable the EMAC clock in at91_macb_hw_init().Markus Hubig2012-09-01-0/+4
* | arm : Atmel : add at91sam9x5ek board supportBo Shen2012-09-01-2/+508
* | DaVinci DA8xx: fix set_cpu_clk_info()Laurence Withers2012-09-01-9/+14
* | DaVinci DA8xx: replace magic number for DDR speedLaurence Withers2012-09-01-1/+4
* | DaVinci DA850: UART2 clock ID comes from ASYNC3Laurence Withers2012-09-01-1/+3
* | DaVinci DA8xx: tidy up clock ID definitionLaurence Withers2012-09-01-16/+40
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